Top-level encodings for A64

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
op0			op1

Decode fields		Instruction details
op0	op1	Instruction details
0	0000	Reserved
1	0000	SME encodings
	0001	UNALLOCATED
	0010	SVE encodings
	0011	UNALLOCATED
	100x	Data Processing -- Immediate
	101x	Branches, Exception Generating and System instructions
	x101	Data Processing -- Register
	x111	Data Processing -- Scalar Floating-Point and Advanced SIMD
	x1x0	Loads and Stores

Reserved

These instructions are under the top-level.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
0	op0		0000				op1

Decode fields		Instruction details
op0	op1	Instruction details
00	000000000	UDF
00	000000001	UNALLOCATED
00	00000001x	UNALLOCATED
00	0000001xx	UNALLOCATED
00	000001xxx	UNALLOCATED
00	00001xxxx	UNALLOCATED
00	0001xxxxx	UNALLOCATED
00	001xxxxxx	UNALLOCATED
00	01xxxxxxx	UNALLOCATED
00	1xxxxxxxx	UNALLOCATED
01		UNALLOCATED
1x		UNALLOCATED

SME encodings

These instructions are under the top-level.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	op0		0000				op1																				op2

Decode fields			Instruction details
op0	op1	op2	Instruction details
0x	x10xxxxxxxxxxxx	xx1x	UNALLOCATED
0x	x11xxxxxxxxxxxx	x0xx	SME Outer Product - 64 bit
0x	x11xxxxxxxxxxxx	x1xx	UNALLOCATED
00	x0xxxxxxxxxxxxx		UNALLOCATED
00	x10xxxxxxxxxxxx	x00x	SME FP Outer Product - 32 bit
00	x10xxxxxxxxxxxx	x10x	SME2 Outer Product - Misc
01	x10xxxxxxxxxxxx	xx0x	SME Integer Outer Product - 32 bit
01	00xxxxxxxxxxxxx		SME2 Multi-vector - Memory (Contiguous)
01	10xxxxxxxxxxxxx		SME2 Multi-vector - Memory (Strided)
10	0xx000x0xxxxxxx	0xxx	SME Move into Array
10	0xx000x0xxxxxxx	1xxx	UNALLOCATED
10	0xx000x1xxxxxxx		SME Move from Array
10	0xx010xxxxxxxxx	x0xx	SME Add Vector to Array
10	0xx010xxxxxxxxx	x1xx	UNALLOCATED
10	0xx1xxxxxxxxxxx		UNALLOCATED
10	00x011xxxxxxxxx		UNALLOCATED
10	0000010xxxxxxxx		SME Zero
10	0000011xxxxxxxx		SME2 Multiple Zero
10	0010010xxxxxxxx		SME2 Zero Lookup Table
10	0010011xxxxxxxx		SME2 Move Lookup Table
10	01x001xxxxxxxxx		SME2 Expand Lookup Table (Contiguous)
10	010011xxxxxxxxx		SME2 Expand Lookup Table (Non-contiguous)
10	011011xxxxxxxxx		UNALLOCATED
10	1xx00xxxxxxxxxx		SME2 Multi-vector - Indexed (One register)
10	1xx01xxxx0xxxxx		SME2 Multi-vector - Indexed (Two registers)
10	1xx01xxxx1xxxxx		SME2 Multi-vector - Indexed (Four registers)
10	1xx1xxxxx100xxx		SME2 Multi-vector - SVE Select
10	1xx1xxxxx110xxx		SME2 Multi-vector - SVE Constructive Binary
10	1xx1xxxxx111000		SME2 Multi-vector - SVE Constructive Unary
10	1xx1xxxxx111001		UNALLOCATED
10	1xx1xxxxx11101x		UNALLOCATED
10	1xx1xxxx0101100		SME2 Multi-vector - Multiple Vectors SVE Destructive (Two registers)
10	1xx1xxxx0101101		SME2 Multi-vector - Multiple Vectors SVE Saturating Multiply (Two registers)
10	1xx1xxx00101110	xxx0	SME2 Multi-vector - Multiple Vectors SVE Destructive (Four registers)
10	1xx1xxx00101111	xxx0	SME2 Multi-vector - Multiple Vectors SVE Saturating Multiply (Four registers)
10	1xx1xxx1010111x		UNALLOCATED
10	1xx10xxxx10100x		SME2 Multi-vector - Multiple and Single SVE Destructive (Two registers)
10	1xx10xxxx10101x	xxx0	SME2 Multi-vector - Multiple and Single SVE Destructive (Four registers)
10	1xx10xxx01111xx		UNALLOCATED
10	1xx10xxx11x11xx		UNALLOCATED
10	1xx10xx00101x1x	xxx1	UNALLOCATED
10	1xx10xx0110101x	xxx1	UNALLOCATED
10	1xx10xx1x10101x	xxx1	UNALLOCATED
10	1xx11xxxx1111xx		UNALLOCATED
10	1xx11xxx01010xx		UNALLOCATED
10	1xx11xxx1101xxx		UNALLOCATED
10	1xx11xx0010111x	xxx1	UNALLOCATED
10	10x10xxxx0xxxxx		SME2 Multi-vector - Multiple and Single Array Vectors (Two registers)
10	10x11xxxx0xxxxx		SME2 Multi-vector - Multiple and Single Array Vectors (Four registers)
10	11x1xxxx00xxxxx		SME2 Multi-vector - Multiple Array Vectors (Two registers)
10	11x1xxxx10xxxxx		SME2 Multi-vector - Multiple Array Vectors (Four registers)
11			SME Memory

SME Outer Product - 64 bit

These instructions are under SME encodings.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
10		op0	0000				op1	11		op2																		0

Decode fields			Instruction details
op0	op1	op2	Instruction details
0	0	0	SME FP64 outer product
0	0	1	UNALLOCATED
0	1		UNALLOCATED
1			SME Int16 outer product

SME FP64 outer product

These instructions are under SME Outer Product - 64 bit.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	0	0	0	0	0	0	0	1	1	0	Zm					Pm			Pn			Zn					S	0	ZAda

Decode fields	Instruction Details	Feature
S	Instruction Details	Feature
0	FMOPA (non-widening)	FEAT_SME_F64F64
1	FMOPS (non-widening)	FEAT_SME_F64F64

SME Int16 outer product

These instructions are under SME Outer Product - 64 bit.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	0	1	0	0	0	0	u0	1	1	u1	Zm					Pm			Pn			Zn					S	0	ZAda

Decode fields			Instruction Details	Feature
u0	u1	S	Instruction Details	Feature
0	0	0	SMOPA (4-way)	FEAT_SME_I16I64
0	0	1	SMOPS (4-way)	FEAT_SME_I16I64
0	1	0	SUMOPA	FEAT_SME_I16I64
0	1	1	SUMOPS	FEAT_SME_I16I64
1	0	0	USMOPA	FEAT_SME_I16I64
1	0	1	USMOPS	FEAT_SME_I16I64
1	1	0	UMOPA (4-way)	FEAT_SME_I16I64
1	1	1	UMOPS (4-way)	FEAT_SME_I16I64

SME FP Outer Product - 32 bit

These instructions are under SME encodings.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1000000							op0	10		op1																	op2	00

Decode fields			Instruction details	Feature
op0	op1	op2	Instruction details	Feature
0	0		SME FP32 outer product	-
0	1	0	FMOPA (widening, 4-way)	FEAT_SME_F8F32
0	1	1	UNALLOCATED	-
1	0		SME BF16 widening outer product	-
1	1		SME FP16 widening outer product	-

SME FP32 outer product

These instructions are under SME FP Outer Product - 32 bit.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	0	0	0	0	0	0	0	1	0	0	Zm					Pm			Pn			Zn					S	0	0	ZAda

Decode fields	Instruction Details	Feature
S	Instruction Details	Feature
0	FMOPA (non-widening)	FEAT_SME
1	FMOPS (non-widening)	FEAT_SME

SME BF16 widening outer product

These instructions are under SME FP Outer Product - 32 bit.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	0	0	0	0	0	0	1	1	0	0	Zm					Pm			Pn			Zn					S	0	0	ZAda

Decode fields	Instruction Details	Feature
S	Instruction Details	Feature
0	BFMOPA (widening)	FEAT_SME
1	BFMOPS (widening)	FEAT_SME

SME FP16 widening outer product

These instructions are under SME FP Outer Product - 32 bit.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	0	0	0	0	0	0	1	1	0	1	Zm					Pm			Pn			Zn					S	0	0	ZAda

Decode fields	Instruction Details	Feature
S	Instruction Details	Feature
0	FMOPA (widening, 2-way, FP16 to FP32)	FEAT_SME
1	FMOPS (widening)	FEAT_SME

SME2 Outer Product - Misc

These instructions are under SME encodings.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1000000							op0	10		op1																	op2	10		op3

Decode fields				Instruction details	Feature
op0	op1	op2	op3	Instruction details	Feature
0	0			SME2 32-bit binary outer product	-
0	1	0	0	FMOPA (widening, 2-way, FP8 to FP16)	FEAT_SME_F8F16
0	1	0	1	UNALLOCATED	-
0	1	1		UNALLOCATED	-
1	0		0	SME2 FP16 non-widening outer product	-
1	1		0	SME2 BF16 non-widening outer product	-
1			1	UNALLOCATED	-

SME2 32-bit binary outer product

These instructions are under SME2 Outer Product - Misc.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	0	0	0	0	0	0	0	1	0	0	Zm					Pm			Pn			Zn					S	1	0	ZAda

Decode fields	Instruction Details	Feature
S	Instruction Details	Feature
0	BMOPA	FEAT_SME2
1	BMOPS	FEAT_SME2

SME2 FP16 non-widening outer product

These instructions are under SME2 Outer Product - Misc.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	0	0	0	0	0	0	1	1	0	0	Zm					Pm			Pn			Zn					S	1	0	0	ZAda

Decode fields	Instruction Details	Feature
S	Instruction Details	Feature
0	FMOPA (non-widening)	FEAT_SME_F16F16
1	FMOPS (non-widening)	FEAT_SME_F16F16

SME2 BF16 non-widening outer product

These instructions are under SME2 Outer Product - Misc.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	0	0	0	0	0	0	1	1	0	1	Zm					Pm			Pn			Zn					S	1	0	0	ZAda

Decode fields	Instruction Details	Feature
S	Instruction Details	Feature
0	BFMOPA (non-widening)	FEAT_SVE_B16B16
1	BFMOPS (non-widening)	FEAT_SVE_B16B16

SME Integer Outer Product - 32 bit

These instructions are under SME encodings.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1010000								10		op0																		op1	0

Decode fields		Instruction details
op0	op1	Instruction details
0	1	SME2 Int16 two-way outer product
1	1	UNALLOCATED
	0	SME Int8 outer product

SME2 Int16 two-way outer product

These instructions are under SME Integer Outer Product - 32 bit.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	0	1	0	0	0	0	u0	1	0	0	Zm					Pm			Pn			Zn					S	1	0	ZAda

Decode fields		Instruction Details	Feature
u0	S	Instruction Details	Feature
0	0	SMOPA (2-way)	FEAT_SME2
0	1	SMOPS (2-way)	FEAT_SME2
1	0	UMOPA (2-way)	FEAT_SME2
1	1	UMOPS (2-way)	FEAT_SME2

SME Int8 outer product

These instructions are under SME Integer Outer Product - 32 bit.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	0	1	0	0	0	0	u0	1	0	u1	Zm					Pm			Pn			Zn					S	0	0	ZAda

Decode fields			Instruction Details	Feature
u0	u1	S	Instruction Details	Feature
0	0	0	SMOPA (4-way)	FEAT_SME
0	0	1	SMOPS (4-way)	FEAT_SME
0	1	0	SUMOPA	FEAT_SME
0	1	1	SUMOPS	FEAT_SME
1	0	0	USMOPA	FEAT_SME
1	0	1	USMOPS	FEAT_SME
1	1	0	UMOPA (4-way)	FEAT_SME
1	1	1	UMOPS (4-way)	FEAT_SME

SME2 Multi-vector - Memory (Contiguous)

These instructions are under SME encodings.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
101000000									op0							op1														op2

Decode fields			Instruction details
op0	op1	op2	Instruction details
00x	0		SME2 multi-vec contiguous load (scalar plus scalar, two registers)
00x	1	0	SME2 multi-vec contiguous load (scalar plus scalar, four registers)
01x	0		SME2 multi-vec contiguous store (scalar plus scalar, two registers)
01x	1	0	SME2 multi-vec contiguous store (scalar plus scalar, four registers)
0xx	1	1	UNALLOCATED
100	0		SME2 multi-vec contiguous load (scalar plus immediate, two registers)
100	1	0	SME2 multi-vec contiguous load (scalar plus immediate, four registers)
110	0		SME2 multi-vec contiguous store (scalar plus immediate, two registers)
110	1	0	SME2 multi-vec contiguous store (scalar plus immediate, four registers)
1x0	1	1	UNALLOCATED
1x1			UNALLOCATED

SME2 multi-vec contiguous load (scalar plus scalar, two registers)

These instructions are under SME2 Multi-vector - Memory (Contiguous).

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	0	1	0	0	0	0	0	0	0	0	Rm					0	msz		PNg			Rn					Zt				N

Decode fields		Instruction Details	Feature
msz	N	Instruction Details	Feature
00	0	LD1B (scalar plus scalar, consecutive registers)	FEAT_SVE2p1
00	1	LDNT1B (scalar plus scalar, consecutive registers)	FEAT_SVE2p1
01	0	LD1H (scalar plus scalar, consecutive registers)	FEAT_SVE2p1
01	1	LDNT1H (scalar plus scalar, consecutive registers)	FEAT_SVE2p1
10	0	LD1W (scalar plus scalar, consecutive registers)	FEAT_SVE2p1
10	1	LDNT1W (scalar plus scalar, consecutive registers)	FEAT_SVE2p1
11	0	LD1D (scalar plus scalar, consecutive registers)	FEAT_SVE2p1
11	1	LDNT1D (scalar plus scalar, consecutive registers)	FEAT_SVE2p1

SME2 multi-vec contiguous load (scalar plus scalar, four registers)

These instructions are under SME2 Multi-vector - Memory (Contiguous).

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	0	1	0	0	0	0	0	0	0	0	Rm					1	msz		PNg			Rn					Zt			0	N

Decode fields		Instruction Details	Feature
msz	N	Instruction Details	Feature
00	0	LD1B (scalar plus scalar, consecutive registers)	FEAT_SVE2p1
00	1	LDNT1B (scalar plus scalar, consecutive registers)	FEAT_SVE2p1
01	0	LD1H (scalar plus scalar, consecutive registers)	FEAT_SVE2p1
01	1	LDNT1H (scalar plus scalar, consecutive registers)	FEAT_SVE2p1
10	0	LD1W (scalar plus scalar, consecutive registers)	FEAT_SVE2p1
10	1	LDNT1W (scalar plus scalar, consecutive registers)	FEAT_SVE2p1
11	0	LD1D (scalar plus scalar, consecutive registers)	FEAT_SVE2p1
11	1	LDNT1D (scalar plus scalar, consecutive registers)	FEAT_SVE2p1

SME2 multi-vec contiguous store (scalar plus scalar, two registers)

These instructions are under SME2 Multi-vector - Memory (Contiguous).

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	0	1	0	0	0	0	0	0	0	1	Rm					0	msz		PNg			Rn					Zt				N

Decode fields		Instruction Details	Feature
msz	N	Instruction Details	Feature
00	0	ST1B (scalar plus scalar, consecutive registers)	FEAT_SVE2p1
00	1	STNT1B (scalar plus scalar, consecutive registers)	FEAT_SVE2p1
01	0	ST1H (scalar plus scalar, consecutive registers)	FEAT_SVE2p1
01	1	STNT1H (scalar plus scalar, consecutive registers)	FEAT_SVE2p1
10	0	ST1W (scalar plus scalar, consecutive registers)	FEAT_SVE2p1
10	1	STNT1W (scalar plus scalar, consecutive registers)	FEAT_SVE2p1
11	0	ST1D (scalar plus scalar, consecutive registers)	FEAT_SVE2p1
11	1	STNT1D (scalar plus scalar, consecutive registers)	FEAT_SVE2p1

SME2 multi-vec contiguous store (scalar plus scalar, four registers)

These instructions are under SME2 Multi-vector - Memory (Contiguous).

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	0	1	0	0	0	0	0	0	0	1	Rm					1	msz		PNg			Rn					Zt			0	N

Decode fields		Instruction Details	Feature
msz	N	Instruction Details	Feature
00	0	ST1B (scalar plus scalar, consecutive registers)	FEAT_SVE2p1
00	1	STNT1B (scalar plus scalar, consecutive registers)	FEAT_SVE2p1
01	0	ST1H (scalar plus scalar, consecutive registers)	FEAT_SVE2p1
01	1	STNT1H (scalar plus scalar, consecutive registers)	FEAT_SVE2p1
10	0	ST1W (scalar plus scalar, consecutive registers)	FEAT_SVE2p1
10	1	STNT1W (scalar plus scalar, consecutive registers)	FEAT_SVE2p1
11	0	ST1D (scalar plus scalar, consecutive registers)	FEAT_SVE2p1
11	1	STNT1D (scalar plus scalar, consecutive registers)	FEAT_SVE2p1

SME2 multi-vec contiguous load (scalar plus immediate, two registers)

These instructions are under SME2 Multi-vector - Memory (Contiguous).

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	0	1	0	0	0	0	0	0	1	0	0	imm4				0	msz		PNg			Rn					Zt				N

Decode fields		Instruction Details	Feature
msz	N	Instruction Details	Feature
00	0	LD1B (scalar plus immediate, consecutive registers)	FEAT_SVE2p1
00	1	LDNT1B (scalar plus immediate, consecutive registers)	FEAT_SVE2p1
01	0	LD1H (scalar plus immediate, consecutive registers)	FEAT_SVE2p1
01	1	LDNT1H (scalar plus immediate, consecutive registers)	FEAT_SVE2p1
10	0	LD1W (scalar plus immediate, consecutive registers)	FEAT_SVE2p1
10	1	LDNT1W (scalar plus immediate, consecutive registers)	FEAT_SVE2p1
11	0	LD1D (scalar plus immediate, consecutive registers)	FEAT_SVE2p1
11	1	LDNT1D (scalar plus immediate, consecutive registers)	FEAT_SVE2p1

SME2 multi-vec contiguous load (scalar plus immediate, four registers)

These instructions are under SME2 Multi-vector - Memory (Contiguous).

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	0	1	0	0	0	0	0	0	1	0	0	imm4				1	msz		PNg			Rn					Zt			0	N

Decode fields		Instruction Details	Feature
msz	N	Instruction Details	Feature
00	0	LD1B (scalar plus immediate, consecutive registers)	FEAT_SVE2p1
00	1	LDNT1B (scalar plus immediate, consecutive registers)	FEAT_SVE2p1
01	0	LD1H (scalar plus immediate, consecutive registers)	FEAT_SVE2p1
01	1	LDNT1H (scalar plus immediate, consecutive registers)	FEAT_SVE2p1
10	0	LD1W (scalar plus immediate, consecutive registers)	FEAT_SVE2p1
10	1	LDNT1W (scalar plus immediate, consecutive registers)	FEAT_SVE2p1
11	0	LD1D (scalar plus immediate, consecutive registers)	FEAT_SVE2p1
11	1	LDNT1D (scalar plus immediate, consecutive registers)	FEAT_SVE2p1

SME2 multi-vec contiguous store (scalar plus immediate, two registers)

These instructions are under SME2 Multi-vector - Memory (Contiguous).

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	0	1	0	0	0	0	0	0	1	1	0	imm4				0	msz		PNg			Rn					Zt				N

Decode fields		Instruction Details	Feature
msz	N	Instruction Details	Feature
00	0	ST1B (scalar plus immediate, consecutive registers)	FEAT_SVE2p1
00	1	STNT1B (scalar plus immediate, consecutive registers)	FEAT_SVE2p1
01	0	ST1H (scalar plus immediate, consecutive registers)	FEAT_SVE2p1
01	1	STNT1H (scalar plus immediate, consecutive registers)	FEAT_SVE2p1
10	0	ST1W (scalar plus immediate, consecutive registers)	FEAT_SVE2p1
10	1	STNT1W (scalar plus immediate, consecutive registers)	FEAT_SVE2p1
11	0	ST1D (scalar plus immediate, consecutive registers)	FEAT_SVE2p1
11	1	STNT1D (scalar plus immediate, consecutive registers)	FEAT_SVE2p1

SME2 multi-vec contiguous store (scalar plus immediate, four registers)

These instructions are under SME2 Multi-vector - Memory (Contiguous).

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	0	1	0	0	0	0	0	0	1	1	0	imm4				1	msz		PNg			Rn					Zt			0	N

Decode fields		Instruction Details	Feature
msz	N	Instruction Details	Feature
00	0	ST1B (scalar plus immediate, consecutive registers)	FEAT_SVE2p1
00	1	STNT1B (scalar plus immediate, consecutive registers)	FEAT_SVE2p1
01	0	ST1H (scalar plus immediate, consecutive registers)	FEAT_SVE2p1
01	1	STNT1H (scalar plus immediate, consecutive registers)	FEAT_SVE2p1
10	0	ST1W (scalar plus immediate, consecutive registers)	FEAT_SVE2p1
10	1	STNT1W (scalar plus immediate, consecutive registers)	FEAT_SVE2p1
11	0	ST1D (scalar plus immediate, consecutive registers)	FEAT_SVE2p1
11	1	STNT1D (scalar plus immediate, consecutive registers)	FEAT_SVE2p1

SME2 Multi-vector - Memory (Strided)

These instructions are under SME encodings.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
101000010									op0							op1													op2

Decode fields			Instruction details
op0	op1	op2	Instruction details
00x	0		SME2 multi-vec non-contiguous load (scalar plus scalar, two registers)
00x	1	0	SME2 multi-vec non-contiguous load (scalar plus scalar, four registers)
01x	0		SME2 multi-vec non-contiguous store (scalar plus scalar, two registers)
01x	1	0	SME2 multi-vec non-contiguous store (scalar plus scalar, four registers)
0xx	1	1	UNALLOCATED
100	0		SME2 multi-vec non-contiguous load (scalar plus immediate, two registers)
100	1	0	SME2 multi-vec non-contiguous load (scalar plus immediate, four registers)
110	0		SME2 multi-vec non-contiguous store (scalar plus immediate, two registers)
110	1	0	SME2 multi-vec non-contiguous store (scalar plus immediate, four registers)
1x0	1	1	UNALLOCATED
1x1			UNALLOCATED

SME2 multi-vec non-contiguous load (scalar plus scalar, two registers)

These instructions are under SME2 Multi-vector - Memory (Strided).

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	0	1	0	0	0	0	1	0	0	0	Rm					0	msz		PNg			Rn					Zth	N	Ztl

Decode fields		Instruction Details	Feature
msz	N	Instruction Details	Feature
00	0	LD1B (scalar plus scalar, strided registers)	FEAT_SME2
00	1	LDNT1B (scalar plus scalar, strided registers)	FEAT_SME2
01	0	LD1H (scalar plus scalar, strided registers)	FEAT_SME2
01	1	LDNT1H (scalar plus scalar, strided registers)	FEAT_SME2
10	0	LD1W (scalar plus scalar, strided registers)	FEAT_SME2
10	1	LDNT1W (scalar plus scalar, strided registers)	FEAT_SME2
11	0	LD1D (scalar plus scalar, strided registers)	FEAT_SME2
11	1	LDNT1D (scalar plus scalar, strided registers)	FEAT_SME2

SME2 multi-vec non-contiguous load (scalar plus scalar, four registers)

These instructions are under SME2 Multi-vector - Memory (Strided).

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	0	1	0	0	0	0	1	0	0	0	Rm					1	msz		PNg			Rn					Zth	N	0	Ztl

Decode fields		Instruction Details	Feature
msz	N	Instruction Details	Feature
00	0	LD1B (scalar plus scalar, strided registers)	FEAT_SME2
00	1	LDNT1B (scalar plus scalar, strided registers)	FEAT_SME2
01	0	LD1H (scalar plus scalar, strided registers)	FEAT_SME2
01	1	LDNT1H (scalar plus scalar, strided registers)	FEAT_SME2
10	0	LD1W (scalar plus scalar, strided registers)	FEAT_SME2
10	1	LDNT1W (scalar plus scalar, strided registers)	FEAT_SME2
11	0	LD1D (scalar plus scalar, strided registers)	FEAT_SME2
11	1	LDNT1D (scalar plus scalar, strided registers)	FEAT_SME2

SME2 multi-vec non-contiguous store (scalar plus scalar, two registers)

These instructions are under SME2 Multi-vector - Memory (Strided).

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	0	1	0	0	0	0	1	0	0	1	Rm					0	msz		PNg			Rn					Zth	N	Ztl

Decode fields		Instruction Details	Feature
msz	N	Instruction Details	Feature
00	0	ST1B (scalar plus scalar, strided registers)	FEAT_SME2
00	1	STNT1B (scalar plus scalar, strided registers)	FEAT_SME2
01	0	ST1H (scalar plus scalar, strided registers)	FEAT_SME2
01	1	STNT1H (scalar plus scalar, strided registers)	FEAT_SME2
10	0	ST1W (scalar plus scalar, strided registers)	FEAT_SME2
10	1	STNT1W (scalar plus scalar, strided registers)	FEAT_SME2
11	0	ST1D (scalar plus scalar, strided registers)	FEAT_SME2
11	1	STNT1D (scalar plus scalar, strided registers)	FEAT_SME2

SME2 multi-vec non-contiguous store (scalar plus scalar, four registers)

These instructions are under SME2 Multi-vector - Memory (Strided).

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	0	1	0	0	0	0	1	0	0	1	Rm					1	msz		PNg			Rn					Zth	N	0	Ztl

Decode fields		Instruction Details	Feature
msz	N	Instruction Details	Feature
00	0	ST1B (scalar plus scalar, strided registers)	FEAT_SME2
00	1	STNT1B (scalar plus scalar, strided registers)	FEAT_SME2
01	0	ST1H (scalar plus scalar, strided registers)	FEAT_SME2
01	1	STNT1H (scalar plus scalar, strided registers)	FEAT_SME2
10	0	ST1W (scalar plus scalar, strided registers)	FEAT_SME2
10	1	STNT1W (scalar plus scalar, strided registers)	FEAT_SME2
11	0	ST1D (scalar plus scalar, strided registers)	FEAT_SME2
11	1	STNT1D (scalar plus scalar, strided registers)	FEAT_SME2

SME2 multi-vec non-contiguous load (scalar plus immediate, two registers)

These instructions are under SME2 Multi-vector - Memory (Strided).

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	0	1	0	0	0	0	1	0	1	0	0	imm4				0	msz		PNg			Rn					Zth	N	Ztl

Decode fields		Instruction Details	Feature
msz	N	Instruction Details	Feature
00	0	LD1B (scalar plus immediate, strided registers)	FEAT_SME2
00	1	LDNT1B (scalar plus immediate, strided registers)	FEAT_SME2
01	0	LD1H (scalar plus immediate, strided registers)	FEAT_SME2
01	1	LDNT1H (scalar plus immediate, strided registers)	FEAT_SME2
10	0	LD1W (scalar plus immediate, strided registers)	FEAT_SME2
10	1	LDNT1W (scalar plus immediate, strided registers)	FEAT_SME2
11	0	LD1D (scalar plus immediate, strided registers)	FEAT_SME2
11	1	LDNT1D (scalar plus immediate, strided registers)	FEAT_SME2

SME2 multi-vec non-contiguous load (scalar plus immediate, four registers)

These instructions are under SME2 Multi-vector - Memory (Strided).

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	0	1	0	0	0	0	1	0	1	0	0	imm4				1	msz		PNg			Rn					Zth	N	0	Ztl

Decode fields		Instruction Details	Feature
msz	N	Instruction Details	Feature
00	0	LD1B (scalar plus immediate, strided registers)	FEAT_SME2
00	1	LDNT1B (scalar plus immediate, strided registers)	FEAT_SME2
01	0	LD1H (scalar plus immediate, strided registers)	FEAT_SME2
01	1	LDNT1H (scalar plus immediate, strided registers)	FEAT_SME2
10	0	LD1W (scalar plus immediate, strided registers)	FEAT_SME2
10	1	LDNT1W (scalar plus immediate, strided registers)	FEAT_SME2
11	0	LD1D (scalar plus immediate, strided registers)	FEAT_SME2
11	1	LDNT1D (scalar plus immediate, strided registers)	FEAT_SME2

SME2 multi-vec non-contiguous store (scalar plus immediate, two registers)

These instructions are under SME2 Multi-vector - Memory (Strided).

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	0	1	0	0	0	0	1	0	1	1	0	imm4				0	msz		PNg			Rn					Zth	N	Ztl

Decode fields		Instruction Details	Feature
msz	N	Instruction Details	Feature
00	0	ST1B (scalar plus immediate, strided registers)	FEAT_SME2
00	1	STNT1B (scalar plus immediate, strided registers)	FEAT_SME2
01	0	ST1H (scalar plus immediate, strided registers)	FEAT_SME2
01	1	STNT1H (scalar plus immediate, strided registers)	FEAT_SME2
10	0	ST1W (scalar plus immediate, strided registers)	FEAT_SME2
10	1	STNT1W (scalar plus immediate, strided registers)	FEAT_SME2
11	0	ST1D (scalar plus immediate, strided registers)	FEAT_SME2
11	1	STNT1D (scalar plus immediate, strided registers)	FEAT_SME2

SME2 multi-vec non-contiguous store (scalar plus immediate, four registers)

These instructions are under SME2 Multi-vector - Memory (Strided).

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	0	1	0	0	0	0	1	0	1	1	0	imm4				1	msz		PNg			Rn					Zth	N	0	Ztl

Decode fields		Instruction Details	Feature
msz	N	Instruction Details	Feature
00	0	ST1B (scalar plus immediate, strided registers)	FEAT_SME2
00	1	STNT1B (scalar plus immediate, strided registers)	FEAT_SME2
01	0	ST1H (scalar plus immediate, strided registers)	FEAT_SME2
01	1	STNT1H (scalar plus immediate, strided registers)	FEAT_SME2
10	0	ST1W (scalar plus immediate, strided registers)	FEAT_SME2
10	1	STNT1W (scalar plus immediate, strided registers)	FEAT_SME2
11	0	ST1D (scalar plus immediate, strided registers)	FEAT_SME2
11	1	STNT1D (scalar plus immediate, strided registers)	FEAT_SME2

SME Move into Array

These instructions are under SME encodings.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
11000000								op0		000			op1	0	op2				op3						op4		0	op5

Decode fields						Instruction details	Feature
op0	op1	op2	op3	op4	op5	Instruction details	Feature
00	1	00	010	x0	0	MOVA (vector to array, two registers)	FEAT_SME2
00	1	00	011	00	0	MOVA (vector to array, four registers)	FEAT_SME2
00	1	00	0x0	x0	1	UNALLOCATED	-
00	1	00	0x0	x1		UNALLOCATED	-
00	1	00	0x1	00	1	UNALLOCATED	-
00	1	00	0x1	!= 00		UNALLOCATED	-
00	1	01	000	x0	1	UNALLOCATED	-
00	1	01	000	x1		UNALLOCATED	-
00	1	01	001	00	1	UNALLOCATED	-
00	1	01	001	!= 00		UNALLOCATED	-
00	1	01	01x			UNALLOCATED	-
!= 00	1	0x	000	x0	1	UNALLOCATED	-
!= 00	1	0x	000	x1		UNALLOCATED	-
!= 00	1	0x	001	00	1	UNALLOCATED	-
!= 00	1	0x	001	01		UNALLOCATED	-
!= 00	1	0x	001	1x		UNALLOCATED	-
!= 00	1	0x	01x			UNALLOCATED	-
	0					SME move vector to array	-
	1	0x	000	x0	0	SME2 move vector to tile, two registers	-
	1	0x	001	00	0	SME2 move vector to tile, four registers	-
	1	0x	1xx			UNALLOCATED	-
	1	1x				UNALLOCATED	-

SME move vector to array

These instructions are under SME Move into Array.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	0	0	size		0	0	0	0	0	Q	V	Rs		Pg			Zn					0	opc

Decode fields		Instruction Details	Feature
size	Q	Instruction Details	Feature
0x	1	UNALLOCATED	-
00	0	MOVA (vector to tile, single) — 8-bit	FEAT_SME
01	0	MOVA (vector to tile, single) — 16-bit	FEAT_SME
10	0	MOVA (vector to tile, single) — 32-bit	FEAT_SME
10	1	UNALLOCATED	-
11	0	MOVA (vector to tile, single) — 64-bit	FEAT_SME
11	1	MOVA (vector to tile, single) — 128-bit	FEAT_SME

SME2 move vector to tile, two registers

These instructions are under SME Move into Array.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	0	0	size		0	0	0	1	0	0	V	Rs		0	0	0	Zn				0	0	0	opc

Decode fields	Instruction Details	Feature
size	Instruction Details	Feature
00	MOVA (vector to tile, two registers) — 8-bit	FEAT_SME2
01	MOVA (vector to tile, two registers) — 16-bit	FEAT_SME2
10	MOVA (vector to tile, two registers) — 32-bit	FEAT_SME2
11	MOVA (vector to tile, two registers) — 64-bit	FEAT_SME2

SME2 move vector to tile, four registers

These instructions are under SME Move into Array.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	0	0	size		0	0	0	1	0	0	V	Rs		0	0	1	Zn			0	0	0	0	opc

Decode fields		Instruction Details	Feature
size	opc	Instruction Details	Feature
0x	1xx	UNALLOCATED	-
00	0xx	MOVA (vector to tile, four registers) — 8-bit	FEAT_SME2
01	0xx	MOVA (vector to tile, four registers) — 16-bit	FEAT_SME2
10	0xx	MOVA (vector to tile, four registers) — 32-bit	FEAT_SME2
10	1xx	UNALLOCATED	-
11		MOVA (vector to tile, four registers) — 64-bit	FEAT_SME2

SME Move from Array

These instructions are under SME encodings.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
11000000								op0		000			op1	1	op2				op3			op4								op5

Decode fields						Instruction details	Feature
op0	op1	op2	op3	op4	op5	Instruction details	Feature
00	1	00	010	00	x0	MOVA (array to vector, two registers)	FEAT_SME2
00	1	00	010	10	x0	MOVAZ (array to vector, two registers)	FEAT_SME2p1
00	1	00	011	00	00	MOVA (array to vector, four registers)	FEAT_SME2
00	1	00	011	10	00	MOVAZ (array to vector, four registers)	FEAT_SME2p1
00	1	00	0x0	x0	x1	UNALLOCATED	-
00	1	00	0x1	x0	!= 00	UNALLOCATED	-
00	1	00	0xx	x1		UNALLOCATED	-
00	1	01	000	x0	x1	UNALLOCATED	-
00	1	01	001	x0	!= 00	UNALLOCATED	-
00	1	01	00x	x1		UNALLOCATED	-
00	1	01	01x			UNALLOCATED	-
!= 00	1	0x	000	x0	x1	UNALLOCATED	-
!= 00	1	0x	001	x0	01	UNALLOCATED	-
!= 00	1	0x	001	x0	1x	UNALLOCATED	-
!= 00	1	0x	00x	x1		UNALLOCATED	-
!= 00	1	0x	01x			UNALLOCATED	-
	0		000	1x		SME zeroing move array to vector	-
	0		!= 000	1x		UNALLOCATED	-
	0			0x		SME move array to vector	-
	1	0x	000	00	x0	SME2 move tile to vector, two registers	-
	1	0x	000	10	x0	SME2 zeroing move tile to vector, two registers	-
	1	0x	001	00	00	SME2 move tile to vector, four registers	-
	1	0x	001	10	00	SME2 zeroing move tile to vector, four registers	-
	1	0x	1xx			UNALLOCATED	-
	1	1x				UNALLOCATED	-

SME zeroing move array to vector

These instructions are under SME Move from Array.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	0	0	size		0	0	0	0	1	Q	V	Rs		0	0	0	1	opc				Zd

Decode fields		Instruction Details	Feature
size	Q	Instruction Details	Feature
0x	1	UNALLOCATED	-
00	0	MOVAZ (tile to vector, single) — 8-bit	FEAT_SME2p1
01	0	MOVAZ (tile to vector, single) — 16-bit	FEAT_SME2p1
10	0	MOVAZ (tile to vector, single) — 32-bit	FEAT_SME2p1
10	1	UNALLOCATED	-
11	0	MOVAZ (tile to vector, single) — 64-bit	FEAT_SME2p1
11	1	MOVAZ (tile to vector, single) — 128-bit	FEAT_SME2p1

SME move array to vector

These instructions are under SME Move from Array.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	0	0	size		0	0	0	0	1	Q	V	Rs		Pg			0	opc				Zd

Decode fields		Instruction Details	Feature
size	Q	Instruction Details	Feature
0x	1	UNALLOCATED	-
00	0	MOVA (tile to vector, single) — 8-bit	FEAT_SME
01	0	MOVA (tile to vector, single) — 16-bit	FEAT_SME
10	0	MOVA (tile to vector, single) — 32-bit	FEAT_SME
10	1	UNALLOCATED	-
11	0	MOVA (tile to vector, single) — 64-bit	FEAT_SME
11	1	MOVA (tile to vector, single) — 128-bit	FEAT_SME

SME2 move tile to vector, two registers

These instructions are under SME Move from Array.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	0	0	size		0	0	0	1	1	0	V	Rs		0	0	0	0	0	opc			Zd				0

Decode fields	Instruction Details	Feature
size	Instruction Details	Feature
00	MOVA (tile to vector, two registers) — 8-bit	FEAT_SME2
01	MOVA (tile to vector, two registers) — 16-bit	FEAT_SME2
10	MOVA (tile to vector, two registers) — 32-bit	FEAT_SME2
11	MOVA (tile to vector, two registers) — 64-bit	FEAT_SME2

SME2 zeroing move tile to vector, two registers

These instructions are under SME Move from Array.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	0	0	size		0	0	0	1	1	0	V	Rs		0	0	0	1	0	opc			Zd				0

Decode fields	Instruction Details	Feature
size	Instruction Details	Feature
00	MOVAZ (tile to vector, two registers) — 8-bit	FEAT_SME2p1
01	MOVAZ (tile to vector, two registers) — 16-bit	FEAT_SME2p1
10	MOVAZ (tile to vector, two registers) — 32-bit	FEAT_SME2p1
11	MOVAZ (tile to vector, two registers) — 64-bit	FEAT_SME2p1

SME2 move tile to vector, four registers

These instructions are under SME Move from Array.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	0	0	size		0	0	0	1	1	0	V	Rs		0	0	1	0	0	opc			Zd			0	0

Decode fields		Instruction Details	Feature
size	opc	Instruction Details	Feature
0x	1xx	UNALLOCATED	-
00	0xx	MOVA (tile to vector, four registers) — 8-bit	FEAT_SME2
01	0xx	MOVA (tile to vector, four registers) — 16-bit	FEAT_SME2
10	0xx	MOVA (tile to vector, four registers) — 32-bit	FEAT_SME2
10	1xx	UNALLOCATED	-
11		MOVA (tile to vector, four registers) — 64-bit	FEAT_SME2

SME2 zeroing move tile to vector, four registers

These instructions are under SME Move from Array.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	0	0	size		0	0	0	1	1	0	V	Rs		0	0	1	1	0	opc			Zd			0	0

Decode fields		Instruction Details	Feature
size	opc	Instruction Details	Feature
0x	1xx	UNALLOCATED	-
00	0xx	MOVAZ (tile to vector, four registers) — 8-bit	FEAT_SME2p1
01	0xx	MOVAZ (tile to vector, four registers) — 16-bit	FEAT_SME2p1
10	0xx	MOVAZ (tile to vector, four registers) — 32-bit	FEAT_SME2p1
10	1xx	UNALLOCATED	-
11		MOVAZ (tile to vector, four registers) — 64-bit	FEAT_SME2p1

SME Add Vector to Array

These instructions are under SME encodings.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
11000000								op0		010			op1														op2	0

Decode fields			Instruction details
op0	op1	op2	Instruction details
0			UNALLOCATED
1	00	0	SME add vector to array
1	00	1	UNALLOCATED
1	!= 00		UNALLOCATED

SME add vector to array

These instructions are under SME Add Vector to Array.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	0	0	1	op	0	1	0	0	0	V	Pm			Pn			Zn					0	0	opc2

Decode fields			Instruction Details	Feature
op	V	opc2	Instruction Details	Feature
0		1xx	UNALLOCATED	-
0	0	0xx	ADDHA — 32-bit	FEAT_SME
0	1	0xx	ADDVA — 32-bit	FEAT_SME
1	0		ADDHA — 64-bit	FEAT_SME_I16I64
1	1		ADDVA — 64-bit	FEAT_SME_I16I64

SME Zero

These instructions are under SME encodings.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
11000000000010														op0

Decode fields	Instruction details	Feature
op0	Instruction details	Feature
0000000000	ZERO (tiles)	FEAT_SME
!= 0000000000	UNALLOCATED	-

SME2 Multiple Zero

These instructions are under SME encodings.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
11000000000011																			op0

Decode fields	Instruction details
op0	Instruction details
0000000000	SME multiple vectors zero array
!= 0000000000	UNALLOCATED

SME multiple vectors zero array

These instructions are under SME2 Multiple Zero.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	0	0	0	0	0	0	1	1	opc			Rv		0	0	0	0	0	0	0	0	0	0	opc2

Decode fields		Instruction Details	Feature
opc	opc2	Instruction Details	Feature
x1x	1xx	UNALLOCATED	-
000		ZERO (single-vector) — two ZA single-vectors	FEAT_SME2p1
001		ZERO (double-vector) — one ZA double-vector	FEAT_SME2p1
010	0xx	ZERO (double-vector) — two ZA double-vectors	FEAT_SME2p1
011	0xx	ZERO (double-vector) — four ZA double-vectors	FEAT_SME2p1
100		ZERO (single-vector) — four ZA single-vectors	FEAT_SME2p1
101	0xx	ZERO (quad-vector) — one ZA quad-vector	FEAT_SME2p1
101	1xx	UNALLOCATED	-
11x	01x	UNALLOCATED	-
110	00x	ZERO (quad-vector) — two ZA quad-vectors	FEAT_SME2p1
111	00x	ZERO (quad-vector) — four ZA quad-vectors	FEAT_SME2p1

SME2 Zero Lookup Table

These instructions are under SME encodings.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
11000000010010														op0

Decode fields	Instruction details
op0	Instruction details
00000000000000	SME2 zero lookup table
!= 00000000000000	UNALLOCATED

SME2 zero lookup table

These instructions are under SME encodings.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	0	0	0	1	0	0	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	opc

Decode fields	Instruction Details	Feature
opc	Instruction Details	Feature
0000	UNALLOCATED	-
0001	ZERO (table)	FEAT_SME2
001x	UNALLOCATED	-
01xx	UNALLOCATED	-
1xxx	UNALLOCATED	-

SME2 zero lookup table

These instructions are under SME2 Zero Lookup Table.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	0	0	0	1	0	0	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	opc

Decode fields	Instruction Details	Feature
opc	Instruction Details	Feature
0000	UNALLOCATED	-
0001	ZERO (table)	FEAT_SME2
001x	UNALLOCATED	-
01xx	UNALLOCATED	-
1xxx	UNALLOCATED	-

SME2 Move Lookup Table

These instructions are under SME encodings.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
11000000010011														op0	op1		op2

Decode fields			Instruction details
op0	op1	op2	Instruction details
0	00		SME2 move from lookup table
0	!= 00		UNALLOCATED
1	00		SME2 move into lookup table
1	10	0	SME2 move vector to lookup table
1	10	1	UNALLOCATED
1	x1		UNALLOCATED

SME2 move from lookup table

These instructions are under SME2 Move Lookup Table.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	0	0	0	1	0	0	1	1	0	0	0	imm3			opc							Rt

Decode fields	Instruction Details	Feature
opc	Instruction Details	Feature
000xxxx	UNALLOCATED	-
0010xxx	UNALLOCATED	-
00110xx	UNALLOCATED	-
001110x	UNALLOCATED	-
0011110	UNALLOCATED	-
0011111	MOVT (table to scalar)	FEAT_SME2
01xxxxx	UNALLOCATED	-
1xxxxxx	UNALLOCATED	-

SME2 move into lookup table

These instructions are under SME2 Move Lookup Table.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	0	0	0	1	0	0	1	1	1	0	0	imm3			opc							Rt

Decode fields	Instruction Details	Feature
opc	Instruction Details	Feature
000xxxx	UNALLOCATED	-
0010xxx	UNALLOCATED	-
00110xx	UNALLOCATED	-
001110x	UNALLOCATED	-
0011110	UNALLOCATED	-
0011111	MOVT (scalar to table)	FEAT_SME2
01xxxxx	UNALLOCATED	-
1xxxxxx	UNALLOCATED	-

SME2 move vector to lookup table

These instructions are under SME2 Move Lookup Table.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	0	0	0	1	0	0	1	1	1	1	0	0	off2		opc							Zt

Decode fields	Instruction Details	Feature
opc	Instruction Details	Feature
000xxxx	UNALLOCATED	-
0010xxx	UNALLOCATED	-
00110xx	UNALLOCATED	-
001110x	UNALLOCATED	-
0011110	UNALLOCATED	-
0011111	MOVT (vector to table)	FEAT_SME_LUTv2
01xxxxx	UNALLOCATED	-
1xxxxxx	UNALLOCATED	-

SME2 Expand Lookup Table (Contiguous)

These instructions are under SME encodings.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
110000001									op0	001			op1													op2				op3

Decode fields				Instruction details
op0	op1	op2	op3	Instruction details
0	00x00			UNALLOCATED
0	01000			UNALLOCATED
0	01100	0	00	SME2 lookup table two source registers expand to four contiguous destination registers
0	01100	0	!= 00	UNALLOCATED
0	01100	1		UNALLOCATED
0	1xx00			UNALLOCATED
0	xxx10		00	SME2 lookup table expand four contiguous registers
0	xxx10		!= 00	UNALLOCATED
0	xxxx1		x0	SME2 lookup table expand two contiguous registers
0	xxxx1		x1	UNALLOCATED
1				SME2 lookup table expand one register

SME2 lookup table two source registers expand to four contiguous destination registers

These instructions are under SME2 Expand Lookup Table (Contiguous).

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	0	0	1	0	0	0	1	0	1	1	0	0	size		opc		Zn				0	Zd			0	0

Decode fields	Instruction Details	Feature
opc	Instruction Details	Feature
00	LUTI4 (four registers, 8-bit)	FEAT_SME_LUTv2
01	UNALLOCATED	-
1x	UNALLOCATED	-

SME2 lookup table expand four contiguous registers

These instructions are under SME2 Expand Lookup Table (Contiguous).

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	0	0	1	0	0	0	1	opc			1	0	size		opc2		Zn					Zd			0	0

Decode fields		Instruction Details	Feature
opc	opc2	Instruction Details	Feature
00x		UNALLOCATED	-
01x	00	LUTI4 (four registers, 16-bit & 32-bit)	FEAT_SME2
01x	01	UNALLOCATED	-
01x	1x	UNALLOCATED	-
1xx	00	LUTI2 (four registers)	FEAT_SME2
1xx	01	UNALLOCATED	-
1xx	1x	UNALLOCATED	-

SME2 lookup table expand two contiguous registers

These instructions are under SME2 Expand Lookup Table (Contiguous).

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	0	0	1	0	0	0	1	opc				1	size		opc2		Zn					Zd				0

Decode fields		Instruction Details	Feature
opc	opc2	Instruction Details	Feature
00xx		UNALLOCATED	-
01xx	00	LUTI4 (two registers)	FEAT_SME2
01xx	01	UNALLOCATED	-
01xx	1x	UNALLOCATED	-
1xxx	00	LUTI2 (two registers)	FEAT_SME2
1xxx	01	UNALLOCATED	-
1xxx	1x	UNALLOCATED	-

SME2 lookup table expand one register

These instructions are under SME2 Expand Lookup Table (Contiguous).

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	0	0	1	1	0	0	1	opc					size		opc2		Zn					Zd

Decode fields		Instruction Details	Feature
opc	opc2	Instruction Details	Feature
00xxx		UNALLOCATED	-
01xxx	00	LUTI4 (single)	FEAT_SME2
01xxx	01	UNALLOCATED	-
01xxx	1x	UNALLOCATED	-
1xxxx	00	LUTI2 (single)	FEAT_SME2
1xxxx	01	UNALLOCATED	-
1xxxx	1x	UNALLOCATED	-

SME2 Expand Lookup Table (Non-contiguous)

These instructions are under SME encodings.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1100000010011													op0			op1										op2		op3

Decode fields				Instruction details
op0	op1	op2	op3	Instruction details
00x	00			UNALLOCATED
010	00			UNALLOCATED
011	00	0	00	SME2 lookup table two source registers expand to four non-contiguous destination registers
011	00	0	!= 00	UNALLOCATED
011	00	1		UNALLOCATED
1xx	00			UNALLOCATED
	10		00	SME2 lookup table expand four non-contiguous registers
	10		01	UNALLOCATED
	!= 00		1x	UNALLOCATED
	x1		0x	SME2 lookup table expand two non-contiguous registers

SME2 lookup table two source registers expand to four non-contiguous destination registers

These instructions are under SME2 Expand Lookup Table (Non-contiguous).

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	0	0	1	0	0	1	1	0	1	1	0	0	size		opc		Zn				0	Zdh	0	0	Zdl

Decode fields	Instruction Details	Feature
opc	Instruction Details	Feature
00	LUTI4 (four registers, 8-bit)	FEAT_SME_LUTv2
01	UNALLOCATED	-
1x	UNALLOCATED	-

SME2 lookup table expand four non-contiguous registers

These instructions are under SME2 Expand Lookup Table (Non-contiguous).

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	0	0	1	0	0	1	1	opc			1	0	size		opc2		Zn					Zdh	0	0	Zdl

Decode fields		Instruction Details	Feature
opc	opc2	Instruction Details	Feature
00x		UNALLOCATED	-
01x	00	LUTI4 (four registers, 16-bit & 32-bit)	FEAT_SME2p1
01x	01	UNALLOCATED	-
01x	1x	UNALLOCATED	-
1xx	00	LUTI2 (four registers)	FEAT_SME2p1
1xx	01	UNALLOCATED	-
1xx	1x	UNALLOCATED	-

SME2 lookup table expand two non-contiguous registers

These instructions are under SME2 Expand Lookup Table (Non-contiguous).

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	0	0	1	0	0	1	1	opc				1	size		opc2		Zn					Zdh	0	Zdl

Decode fields		Instruction Details	Feature
opc	opc2	Instruction Details	Feature
00xx		UNALLOCATED	-
01xx	00	LUTI4 (two registers)	FEAT_SME2p1
01xx	01	UNALLOCATED	-
01xx	1x	UNALLOCATED	-
1xxx	00	LUTI2 (two registers)	FEAT_SME2p1
1xxx	01	UNALLOCATED	-
1xxx	1x	UNALLOCATED	-

SME2 Multi-vector - Indexed (One register)

These instructions are under SME encodings.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
11000001								op0		00									op1								op2

Decode fields			Instruction details	Feature
op0	op1	op2	Instruction details	Feature
00			SME2 multi-vec indexed long long MLA one source 32-bit	-
01		000	FMLALL (multiple and indexed vector) — One ZA quad-vector	FEAT_SME_F8F32
01		!= 000	UNALLOCATED	-
10	0	xx0	SME2 multi-vec indexed long long MLA one source 64-bit	-
10	0	xx1	UNALLOCATED	-
10	1		SME2 multi-vec indexed long FMA one source	-
11	0	0xx	FMLAL (multiple and indexed vector, FP8 to FP16) — One ZA double-vector	FEAT_SME_F8F16
11	0	1xx	UNALLOCATED	-
11	1		SME2 multi-vec indexed long MLA one source	-

SME2 multi-vec indexed long long MLA one source 32-bit

These instructions are under SME2 Multi-vector - Indexed (One register).

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	0	1	0	0	0	0	Zm				i4h	Rv		i4l			Zn					U	S	op	off2

Decode fields			Instruction Details	Feature
U	S	op	Instruction Details	Feature
	1	1	UNALLOCATED	-
0	0	0	SMLALL (multiple and indexed vector)	FEAT_SME2
0	0	1	USMLALL (multiple and indexed vector)	FEAT_SME2
0	1	0	SMLSLL (multiple and indexed vector)	FEAT_SME2
1	0	0	UMLALL (multiple and indexed vector)	FEAT_SME2
1	0	1	SUMLALL (multiple and indexed vector)	FEAT_SME2
1	1	0	UMLSLL (multiple and indexed vector)	FEAT_SME2

SME2 multi-vec indexed long long MLA one source 64-bit

These instructions are under SME2 Multi-vector - Indexed (One register).

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	0	1	1	0	0	0	Zm				i3h	Rv		0	i3l		Zn					U	S	0	off2

Decode fields		Instruction Details	Feature
U	S	Instruction Details	Feature
0	0	SMLALL (multiple and indexed vector)	FEAT_SME_I16I64
0	1	SMLSLL (multiple and indexed vector)	FEAT_SME_I16I64
1	0	UMLALL (multiple and indexed vector)	FEAT_SME_I16I64
1	1	UMLSLL (multiple and indexed vector)	FEAT_SME_I16I64

SME2 multi-vec indexed long FMA one source

These instructions are under SME2 Multi-vector - Indexed (One register).

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	0	1	1	0	0	0	Zm				i3h	Rv		1	i3l		Zn					op	S	off3

Decode fields		Instruction Details	Feature
op	S	Instruction Details	Feature
0	0	FMLAL (multiple and indexed vector, FP16 to FP32)	FEAT_SME2
0	1	FMLSL (multiple and indexed vector)	FEAT_SME2
1	0	BFMLAL (multiple and indexed vector)	FEAT_SME2
1	1	BFMLSL (multiple and indexed vector)	FEAT_SME2

SME2 multi-vec indexed long MLA one source

These instructions are under SME2 Multi-vector - Indexed (One register).

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	0	1	1	1	0	0	Zm				i3h	Rv		1	i3l		Zn					U	S	off3

Decode fields		Instruction Details	Feature
U	S	Instruction Details	Feature
0	0	SMLAL (multiple and indexed vector)	FEAT_SME2
0	1	SMLSL (multiple and indexed vector)	FEAT_SME2
1	0	UMLAL (multiple and indexed vector)	FEAT_SME2
1	1	UMLSL (multiple and indexed vector)	FEAT_SME2

SME2 Multi-vector - Indexed (Two registers)

These instructions are under SME encodings.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
11000001								op0		01						0			op1							op2	op3

Decode fields				Instruction details	Feature
op0	op1	op2	op3	Instruction details	Feature
00	0x			SME2 multi-vec indexed long long MLA two sources 32-bit	-
00	1x			SME2 multi-vec ternary indexed two registers 16-bit	-
01				SME2 multi-vec ternary indexed two registers 32-bit	-
10	00	0		SME2 multi-vec indexed long long MLA two sources 64-bit	-
10	01	0		UNALLOCATED	-
10	0x	1	00	FMLALL (multiple and indexed vector) — Two ZA quad-vectors	FEAT_SME_F8F32
10	0x	1	!= 00	UNALLOCATED	-
10	1x	0		SME2 multi-vec indexed long FMA two sources	-
10	1x	1	0x	UNALLOCATED	-
10	1x	1	1x	FMLAL (multiple and indexed vector, FP8 to FP16) — Two ZA double-vectors	FEAT_SME_F8F16
11	00	0		SME2 multi-vec ternary indexed two registers 64-bit	-
11	01	0		SME2 multi-vec indexed FP8 two-way vertical dot product to single precision two registers	-
11	1x	0		SME2 multi-vec indexed long MLA two sources	-
11		1	0x	SME2 multi-vec indexed FP8 two-way dot product to FP16 two registers	-
11		1	1x	UNALLOCATED	-

SME2 multi-vec indexed long long MLA two sources 32-bit

These instructions are under SME2 Multi-vector - Indexed (Two registers).

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	0	1	0	0	0	1	Zm				0	Rv		0	i4h		Zn				op	U	S	i4l		o1

Decode fields			Instruction Details	Feature
op	U	S	Instruction Details	Feature
0	0	0	SMLALL (multiple and indexed vector)	FEAT_SME2
0	0	1	SMLSLL (multiple and indexed vector)	FEAT_SME2
0	1	0	UMLALL (multiple and indexed vector)	FEAT_SME2
0	1	1	UMLSLL (multiple and indexed vector)	FEAT_SME2
1		1	UNALLOCATED	-
1	0	0	USMLALL (multiple and indexed vector)	FEAT_SME2
1	1	0	SUMLALL (multiple and indexed vector)	FEAT_SME2

SME2 multi-vec ternary indexed two registers 16-bit

These instructions are under SME2 Multi-vector - Indexed (Two registers).

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	0	1	0	0	0	1	Zm				0	Rv		1	i3h		Zn				op	S	i3l	off3

Decode fields		Instruction Details	Feature
op	S	Instruction Details	Feature
0	0	FMLA (multiple and indexed vector)	FEAT_SME_F16F16
0	1	FMLS (multiple and indexed vector)	FEAT_SME_F16F16
1	0	BFMLA (multiple and indexed vector)	FEAT_SVE_B16B16
1	1	BFMLS (multiple and indexed vector)	FEAT_SVE_B16B16

SME2 multi-vec ternary indexed two registers 32-bit

These instructions are under SME2 Multi-vector - Indexed (Two registers).

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	0	1	0	1	0	1	Zm				0	Rv		op	i2		Zn				opc2			off3

Decode fields		Instruction Details	Feature
op	opc2	Instruction Details	Feature
0	000	FMLA (multiple and indexed vector)	FEAT_SME2
0	001	FVDOT (FP16 to FP32)	FEAT_SME2
0	010	FMLS (multiple and indexed vector)	FEAT_SME2
0	011	BFVDOT	FEAT_SME2
0	100	SVDOT (2-way)	FEAT_SME2
0	101	UNALLOCATED	-
0	110	UVDOT (2-way)	FEAT_SME2
0	111	FDOT (4-way, multiple and indexed vector)	FEAT_SME_F8F32
1	000	SDOT (2-way, multiple and indexed vector)	FEAT_SME2
1	001	FDOT (2-way, multiple and indexed vector, FP16 to FP32)	FEAT_SME2
1	010	UDOT (2-way, multiple and indexed vector)	FEAT_SME2
1	011	BFDOT (multiple and indexed vector)	FEAT_SME2
1	100	SDOT (4-way, multiple and indexed vector)	FEAT_SME2
1	101	USDOT (multiple and indexed vector)	FEAT_SME2
1	110	UDOT (4-way, multiple and indexed vector)	FEAT_SME2
1	111	SUDOT (multiple and indexed vector)	FEAT_SME2

SME2 multi-vec indexed long long MLA two sources 64-bit

These instructions are under SME2 Multi-vector - Indexed (Two registers).

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	0	1	1	0	0	1	Zm				0	Rv		0	0	i3h	Zn				0	U	S	i3l		o1

Decode fields		Instruction Details	Feature
U	S	Instruction Details	Feature
0	0	SMLALL (multiple and indexed vector)	FEAT_SME_I16I64
0	1	SMLSLL (multiple and indexed vector)	FEAT_SME_I16I64
1	0	UMLALL (multiple and indexed vector)	FEAT_SME_I16I64
1	1	UMLSLL (multiple and indexed vector)	FEAT_SME_I16I64

SME2 multi-vec indexed long FMA two sources

These instructions are under SME2 Multi-vector - Indexed (Two registers).

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	0	1	1	0	0	1	Zm				0	Rv		1	i3h		Zn				0	op	S	i3l	off2

Decode fields		Instruction Details	Feature
op	S	Instruction Details	Feature
0	0	FMLAL (multiple and indexed vector, FP16 to FP32)	FEAT_SME2
0	1	FMLSL (multiple and indexed vector)	FEAT_SME2
1	0	BFMLAL (multiple and indexed vector)	FEAT_SME2
1	1	BFMLSL (multiple and indexed vector)	FEAT_SME2

SME2 multi-vec ternary indexed two registers 64-bit

These instructions are under SME2 Multi-vector - Indexed (Two registers).

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	0	1	1	1	0	1	Zm				0	Rv		0	0	i1	Zn				0	opc		off3

Decode fields	Instruction Details	Feature
opc	Instruction Details	Feature
00	FMLA (multiple and indexed vector)	FEAT_SME_F64F64
01	SDOT (4-way, multiple and indexed vector)	FEAT_SME_I16I64
10	FMLS (multiple and indexed vector)	FEAT_SME_F64F64
11	UDOT (4-way, multiple and indexed vector)	FEAT_SME_I16I64

SME2 multi-vec indexed FP8 two-way vertical dot product to single precision two registers

These instructions are under SME2 Multi-vector - Indexed (Two registers).

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	0	1	1	1	0	1	Zm				0	Rv		0	1	i2h	Zn				0	T	i2l	off3

Decode fields	Instruction Details	Feature
T	Instruction Details	Feature
0	FVDOTB	FEAT_SME_F8F32
1	FVDOTT	FEAT_SME_F8F32

SME2 multi-vec indexed long MLA two sources

These instructions are under SME2 Multi-vector - Indexed (Two registers).

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	0	1	1	1	0	1	Zm				0	Rv		1	i3h		Zn				0	U	S	i3l	off2

Decode fields		Instruction Details	Feature
U	S	Instruction Details	Feature
0	0	SMLAL (multiple and indexed vector)	FEAT_SME2
0	1	SMLSL (multiple and indexed vector)	FEAT_SME2
1	0	UMLAL (multiple and indexed vector)	FEAT_SME2
1	1	UMLSL (multiple and indexed vector)	FEAT_SME2

SME2 multi-vec indexed FP8 two-way dot product to FP16 two registers

These instructions are under SME2 Multi-vector - Indexed (Two registers).

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	0	1	1	1	0	1	Zm				0	Rv		op	i3h		Zn				1	0	i3l	off3

Decode fields	Instruction Details	Feature
op	Instruction Details	Feature
0	FDOT (2-way, multiple and indexed vector, FP8 to FP16)	FEAT_SME_F8F16
1	FVDOT (FP8 to FP16)	FEAT_SME_F8F16

SME2 Multi-vector - Indexed (Four registers)

These instructions are under SME encodings.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
11000001								op0		01						1			op1						op2			op3

Decode fields				Instruction details	Feature
op0	op1	op2	op3	Instruction details	Feature
00	0x	0xx		SME2 multi-vec indexed long long MLA four sources 32-bit	-
00	0x	100	0	FMLALL (multiple and indexed vector) — Four ZA quad-vectors	FEAT_SME_F8F32
00	0x	100	1	UNALLOCATED	-
00	1x	0xx		SME2 multi-vec ternary indexed four registers 16-bit	-
00	1x	100		FDOT (2-way, multiple and indexed vector, FP8 to FP16) — Four ZA single-vectors	FEAT_SME_F8F16
00		1!= 00		UNALLOCATED	-
01		0xx		SME2 multi-vec ternary indexed four registers 32-bit	-
10	00	00x		SME2 multi-vec indexed long long MLA four sources 64-bit	-
10	00	!= 00x		UNALLOCATED	-
10	01			UNALLOCATED	-
10	1x	00x		SME2 multi-vec indexed long FMA four sources	-
10	1x	010		FMLAL (multiple and indexed vector, FP8 to FP16) — Four ZA double-vectors	FEAT_SME_F8F16
10	1x	011		UNALLOCATED	-
10	1x	1xx		UNALLOCATED	-
11	0x	00x		SME2 multi-vec ternary indexed four registers 64-bit	-
11	1x	00x		SME2 multi-vec indexed long MLA four sources	-
11		01x		UNALLOCATED	-
x1		1xx		UNALLOCATED	-

SME2 multi-vec indexed long long MLA four sources 32-bit

These instructions are under SME2 Multi-vector - Indexed (Four registers).

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	0	1	0	0	0	1	Zm				1	Rv		0	i4h		Zn			0	op	U	S	i4l		o1

Decode fields			Instruction Details	Feature
op	U	S	Instruction Details	Feature
0	0	0	SMLALL (multiple and indexed vector)	FEAT_SME2
0	0	1	SMLSLL (multiple and indexed vector)	FEAT_SME2
0	1	0	UMLALL (multiple and indexed vector)	FEAT_SME2
0	1	1	UMLSLL (multiple and indexed vector)	FEAT_SME2
1		1	UNALLOCATED	-
1	0	0	USMLALL (multiple and indexed vector)	FEAT_SME2
1	1	0	SUMLALL (multiple and indexed vector)	FEAT_SME2

SME2 multi-vec ternary indexed four registers 16-bit

These instructions are under SME2 Multi-vector - Indexed (Four registers).

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	0	1	0	0	0	1	Zm				1	Rv		1	i3h		Zn			0	op	S	i3l	off3

Decode fields		Instruction Details	Feature
op	S	Instruction Details	Feature
0	0	FMLA (multiple and indexed vector)	FEAT_SME_F16F16
0	1	FMLS (multiple and indexed vector)	FEAT_SME_F16F16
1	0	BFMLA (multiple and indexed vector)	FEAT_SVE_B16B16
1	1	BFMLS (multiple and indexed vector)	FEAT_SVE_B16B16

SME2 multi-vec ternary indexed four registers 32-bit

These instructions are under SME2 Multi-vector - Indexed (Four registers).

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	0	1	0	1	0	1	Zm				1	Rv		op	i2		Zn			0	opc2			off3

Decode fields		Instruction Details	Feature
op	opc2	Instruction Details	Feature
0	000	FMLA (multiple and indexed vector)	FEAT_SME2
0	001	FDOT (4-way, multiple and indexed vector)	FEAT_SME_F8F32
0	010	FMLS (multiple and indexed vector)	FEAT_SME2
0	011	UNALLOCATED	-
0	100	SVDOT (4-way)	FEAT_SME2
0	101	USVDOT	FEAT_SME2
0	110	UVDOT (4-way)	FEAT_SME2
0	111	SUVDOT	FEAT_SME2
1	000	SDOT (2-way, multiple and indexed vector)	FEAT_SME2
1	001	FDOT (2-way, multiple and indexed vector, FP16 to FP32)	FEAT_SME2
1	010	UDOT (2-way, multiple and indexed vector)	FEAT_SME2
1	011	BFDOT (multiple and indexed vector)	FEAT_SME2
1	100	SDOT (4-way, multiple and indexed vector)	FEAT_SME2
1	101	USDOT (multiple and indexed vector)	FEAT_SME2
1	110	UDOT (4-way, multiple and indexed vector)	FEAT_SME2
1	111	SUDOT (multiple and indexed vector)	FEAT_SME2

SME2 multi-vec indexed long long MLA four sources 64-bit

These instructions are under SME2 Multi-vector - Indexed (Four registers).

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	0	1	1	0	0	1	Zm				1	Rv		0	0	i3h	Zn			0	0	U	S	i3l		o1

Decode fields		Instruction Details	Feature
U	S	Instruction Details	Feature
0	0	SMLALL (multiple and indexed vector)	FEAT_SME_I16I64
0	1	SMLSLL (multiple and indexed vector)	FEAT_SME_I16I64
1	0	UMLALL (multiple and indexed vector)	FEAT_SME_I16I64
1	1	UMLSLL (multiple and indexed vector)	FEAT_SME_I16I64

SME2 multi-vec indexed long FMA four sources

These instructions are under SME2 Multi-vector - Indexed (Four registers).

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	0	1	1	0	0	1	Zm				1	Rv		1	i3h		Zn			0	0	op	S	i3l	off2

Decode fields		Instruction Details	Feature
op	S	Instruction Details	Feature
0	0	FMLAL (multiple and indexed vector, FP16 to FP32)	FEAT_SME2
0	1	FMLSL (multiple and indexed vector)	FEAT_SME2
1	0	BFMLAL (multiple and indexed vector)	FEAT_SME2
1	1	BFMLSL (multiple and indexed vector)	FEAT_SME2

SME2 multi-vec ternary indexed four registers 64-bit

These instructions are under SME2 Multi-vector - Indexed (Four registers).

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	0	1	1	1	0	1	Zm				1	Rv		0	op	i1	Zn			0	0	opc2		off3

Decode fields		Instruction Details	Feature
op	opc2	Instruction Details	Feature
0	00	FMLA (multiple and indexed vector)	FEAT_SME_F64F64
0	01	SDOT (4-way, multiple and indexed vector)	FEAT_SME_I16I64
0	10	FMLS (multiple and indexed vector)	FEAT_SME_F64F64
0	11	UDOT (4-way, multiple and indexed vector)	FEAT_SME_I16I64
1	x0	UNALLOCATED	-
1	01	SVDOT (4-way)	FEAT_SME_I16I64
1	11	UVDOT (4-way)	FEAT_SME_I16I64

SME2 multi-vec indexed long MLA four sources

These instructions are under SME2 Multi-vector - Indexed (Four registers).

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	0	1	1	1	0	1	Zm				1	Rv		1	i3h		Zn			0	0	U	S	i3l	off2

Decode fields		Instruction Details	Feature
U	S	Instruction Details	Feature
0	0	SMLAL (multiple and indexed vector)	FEAT_SME2
0	1	SMLSL (multiple and indexed vector)	FEAT_SME2
1	0	UMLAL (multiple and indexed vector)	FEAT_SME2
1	1	UMLSL (multiple and indexed vector)	FEAT_SME2

SME2 Multi-vector - SVE Select

These instructions are under SME encodings.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
11000001										1				op0		100									op1					op2

Decode fields			Instruction details	Feature
op0	op1	op2	Instruction details	Feature
01	00	00	SEL — Four registers	FEAT_SME2
01	00	!= 00	UNALLOCATED	-
01	!= 00		UNALLOCATED	-
11			UNALLOCATED	-
x0	x0	x0	SEL — Two registers	FEAT_SME2
x0	x0	x1	UNALLOCATED	-
x0	x1		UNALLOCATED	-

SME2 Multi-vector - SVE Constructive Binary

These instructions are under SME encodings.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
11000001								op0		1						110			op1											op2

Decode fields			Instruction details
op0	op1	op2	Instruction details
00	101		SME2 multi-vec quadwords ZIP two registers
01	101		UNALLOCATED
10	101		UNALLOCATED
11	101		SME2 multi-vec saturating shift right narrow two registers
	000		SME2 multi-vec FCLAMP two registers
	001		SME2 multi-vec CLAMP two registers
	010	0	SME2 multi-vec FCLAMP four registers
	011	0	SME2 multi-vec CLAMP four registers
	01x	1	UNALLOCATED
	100		SME2 multi-vec ZIP two registers
	11x		SME2 multi-vec saturating shift right narrow four registers

SME2 multi-vec quadwords ZIP two registers

These instructions are under SME2 Multi-vector - SVE Constructive Binary.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	0	1	0	0	1	Zm					1	1	0	1	0	1	Zn					Zd				op

Decode fields	Instruction Details	Feature
op	Instruction Details	Feature
0	ZIP (two registers)	FEAT_SME2
1	UZP (two registers)	FEAT_SME2

SME2 multi-vec saturating shift right narrow two registers

These instructions are under SME2 Multi-vector - SVE Constructive Binary.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	0	1	1	1	1	op	imm4				1	1	0	1	0	1	Zn				U	Zd

Decode fields		Instruction Details	Feature
op	U	Instruction Details	Feature
0	0	SQRSHR (two registers)	FEAT_SME2
0	1	UQRSHR (two registers)	FEAT_SME2
1	0	SQRSHRU (two registers)	FEAT_SME2
1	1	UNALLOCATED	-

SME2 multi-vec FCLAMP two registers

These instructions are under SME2 Multi-vector - SVE Constructive Binary.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	0	1	size		1	Zm					1	1	0	0	0	0	Zn					Zd				op

Decode fields		Instruction Details	Feature
size	op	Instruction Details	Feature
	1	UNALLOCATED	-
!= 00	0	FCLAMP	FEAT_SME2
00	0	BFCLAMP	FEAT_SVE_B16B16

SME2 multi-vec CLAMP two registers

These instructions are under SME2 Multi-vector - SVE Constructive Binary.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	0	1	size		1	Zm					1	1	0	0	0	1	Zn					Zd				U

Decode fields	Instruction Details	Feature
U	Instruction Details	Feature
0	SCLAMP	FEAT_SME2
1	UCLAMP	FEAT_SME2

SME2 multi-vec FCLAMP four registers

These instructions are under SME2 Multi-vector - SVE Constructive Binary.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	0	1	size		1	Zm					1	1	0	0	1	0	Zn					Zd			0	op

Decode fields		Instruction Details	Feature
size	op	Instruction Details	Feature
	1	UNALLOCATED	-
!= 00	0	FCLAMP	FEAT_SME2
00	0	BFCLAMP	FEAT_SVE_B16B16

SME2 multi-vec CLAMP four registers

These instructions are under SME2 Multi-vector - SVE Constructive Binary.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	0	1	size		1	Zm					1	1	0	0	1	1	Zn					Zd			0	U

Decode fields	Instruction Details	Feature
U	Instruction Details	Feature
0	SCLAMP	FEAT_SME2
1	UCLAMP	FEAT_SME2

SME2 multi-vec ZIP two registers

These instructions are under SME2 Multi-vector - SVE Constructive Binary.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	0	1	size		1	Zm					1	1	0	1	0	0	Zn					Zd				op

Decode fields	Instruction Details	Feature
op	Instruction Details	Feature
0	ZIP (two registers)	FEAT_SME2
1	UZP (two registers)	FEAT_SME2

SME2 multi-vec saturating shift right narrow four registers

These instructions are under SME2 Multi-vector - SVE Constructive Binary.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	0	1	tsize		1	imm5					1	1	0	1	1	N	Zn			op	U	Zd

Decode fields			Instruction Details	Feature
N	op	U	Instruction Details	Feature
	1	1	UNALLOCATED	-
0	0	0	SQRSHR (four registers)	FEAT_SME2
0	0	1	UQRSHR (four registers)	FEAT_SME2
0	1	0	SQRSHRU (four registers)	FEAT_SME2
1	0	0	SQRSHRN	FEAT_SME2
1	0	1	UQRSHRN	FEAT_SME2
1	1	0	SQRSHRUN	FEAT_SME2

SME2 Multi-vector - SVE Constructive Unary

These instructions are under SME encodings.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
11000001								op0		1	op1			op2		111000									op3					op4

Decode fields					Instruction details
op0	op1	op2	op3	op4	Instruction details
00	000	01		x0	SME2 multi-vec FP to int convert two registers
00	000	01		x1	UNALLOCATED
00	000	10		x0	SME2 multi-vec int to FP two registers
00	000	10		x1	UNALLOCATED
00	001	11			UNALLOCATED
00	100	00			UNALLOCATED
00	100	01	0x	00	SME2 multi-vec FP to int convert four registers
00	100	01	0x	!= 00	UNALLOCATED
00	100	01	1x		UNALLOCATED
00	100	10	0x	00	SME2 multi-vec int to FP four registers
00	100	10	0x	!= 00	UNALLOCATED
00	100	10	1x		UNALLOCATED
00	101	00	0x		SME2 multi-vec FP8 down convert four registers
00	101	00	1x		UNALLOCATED
00	101	11	00	x0	SME2 multi-vec quadwords ZIP four registers
00	101	1x	00	x1	UNALLOCATED
00	101	1x	!= 00		UNALLOCATED
01	000	01			UNALLOCATED
01	101	00			UNALLOCATED
01	x00	10			UNALLOCATED
0x	000	00			SME2 multi-vec FP down convert two registers
0x	000	11			SME2 multi-vec int down convert two registers
0x	001	00	x0		SME2 multi-vec FP8 down convert two registers
0x	001	00	x1		UNALLOCATED
10	000	00			SME2 multi-vec convert two registers
10	000	!= 00			UNALLOCATED
11	000				UNALLOCATED
1x	100	10			UNALLOCATED
1x	x01	00			UNALLOCATED
!= 00	100	0x			UNALLOCATED
!= 00	101	10	00	x1	UNALLOCATED
!= 00	101	10	01		UNALLOCATED
!= 00	101	10	1x		UNALLOCATED
!= 00	x01	11			UNALLOCATED
	001	01			SME2 multi-vec unpack two registers
	001	10			SME2 multi-vec FP8 up convert two registers
	01x		x0	x0	SME2 multi-vec FRINT two registers
	01x		x0	x1	UNALLOCATED
	01x		x1		UNALLOCATED
	100	11			SME2 multi-vec int down convert four registers
	101	01	x0	0x	SME2 multi-vec unpack four registers
	101	01	x0	1x	UNALLOCATED
	101	01	x1		UNALLOCATED
	101	10	00	x0	SME2 multi-vec ZIP four registers
	11x		00	00	SME2 multi-vec FRINT four registers
	11x		00	!= 00	UNALLOCATED
	11x		!= 00		UNALLOCATED

SME2 multi-vec FP to int convert two registers

These instructions are under SME2 Multi-vector - SVE Constructive Unary.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	0	1	0	0	1	0	0	0	0	1	1	1	1	0	0	0	Zn				U	Zd				0

Decode fields	Instruction Details	Feature
U	Instruction Details	Feature
0	FCVTZS	FEAT_SME2
1	FCVTZU	FEAT_SME2

SME2 multi-vec int to FP two registers

These instructions are under SME2 Multi-vector - SVE Constructive Unary.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	0	1	0	0	1	0	0	0	1	0	1	1	1	0	0	0	Zn				U	Zd				0

Decode fields	Instruction Details	Feature
U	Instruction Details	Feature
0	SCVTF	FEAT_SME2
1	UCVTF	FEAT_SME2

SME2 multi-vec FP to int convert four registers

These instructions are under SME2 Multi-vector - SVE Constructive Unary.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	0	1	0	0	1	1	0	0	0	1	1	1	1	0	0	0	Zn			0	U	Zd			0	0

Decode fields	Instruction Details	Feature
U	Instruction Details	Feature
0	FCVTZS	FEAT_SME2
1	FCVTZU	FEAT_SME2

SME2 multi-vec int to FP four registers

These instructions are under SME2 Multi-vector - SVE Constructive Unary.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	0	1	0	0	1	1	0	0	1	0	1	1	1	0	0	0	Zn			0	U	Zd			0	0

Decode fields	Instruction Details	Feature
U	Instruction Details	Feature
0	SCVTF	FEAT_SME2
1	UCVTF	FEAT_SME2

SME2 multi-vec FP8 down convert four registers

These instructions are under SME2 Multi-vector - SVE Constructive Unary.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	0	1	0	0	1	1	0	1	0	0	1	1	1	0	0	0	Zn			0	N	Zd

Decode fields	Instruction Details	Feature
N	Instruction Details	Feature
0	FCVT (narrowing, FP32 to FP8)	FEAT_FP8
1	FCVTN (FP32 to FP8)	FEAT_FP8

SME2 multi-vec quadwords ZIP four registers

These instructions are under SME2 Multi-vector - SVE Constructive Unary.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	0	1	0	0	1	1	0	1	1	1	1	1	1	0	0	0	Zn			0	0	Zd			op	0

Decode fields	Instruction Details	Feature
op	Instruction Details	Feature
0	ZIP (four registers)	FEAT_SME2
1	UZP (four registers)	FEAT_SME2

SME2 multi-vec FP down convert two registers

These instructions are under SME2 Multi-vector - SVE Constructive Unary.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	0	1	0	op	1	0	0	0	0	0	1	1	1	0	0	0	Zn				N	Zd

Decode fields		Instruction Details	Feature
op	N	Instruction Details	Feature
0	0	FCVT (narrowing, FP32 to FP16)	FEAT_SME2
0	1	FCVTN (FP32 to FP16)	FEAT_SME2
1	0	BFCVT	FEAT_SME2
1	1	BFCVTN	FEAT_SME2

SME2 multi-vec int down convert two registers

These instructions are under SME2 Multi-vector - SVE Constructive Unary.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	0	1	0	op	1	0	0	0	1	1	1	1	1	0	0	0	Zn				U	Zd

Decode fields		Instruction Details	Feature
op	U	Instruction Details	Feature
0	0	SQCVT (two registers)	FEAT_SME2
0	1	UQCVT (two registers)	FEAT_SME2
1	0	SQCVTU (two registers)	FEAT_SME2
1	1	UNALLOCATED	-

SME2 multi-vec FP8 down convert two registers

These instructions are under SME2 Multi-vector - SVE Constructive Unary.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	0	1	0	op	1	0	0	1	0	0	1	1	1	0	0	0	Zn				0	Zd

Decode fields	Instruction Details	Feature
op	Instruction Details	Feature
0	FCVT (narrowing, FP16 to FP8)	FEAT_FP8
1	BFCVT	FEAT_FP8

SME2 multi-vec convert two registers

These instructions are under SME2 Multi-vector - SVE Constructive Unary.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	0	1	1	0	1	0	0	0	0	0	1	1	1	0	0	0	Zn					Zd				L

Decode fields	Instruction Details	Feature
L	Instruction Details	Feature
0	FCVT (widening)	FEAT_SME_F16F16
1	FCVTL	FEAT_SME_F16F16

SME2 multi-vec unpack two registers

These instructions are under SME2 Multi-vector - SVE Constructive Unary.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	0	1	size		1	0	0	1	0	1	1	1	1	0	0	0	Zn					Zd				U

Decode fields	Instruction Details	Feature
U	Instruction Details	Feature
0	SUNPK	FEAT_SME2
1	UUNPK	FEAT_SME2

SME2 multi-vec FP8 up convert two registers

These instructions are under SME2 Multi-vector - SVE Constructive Unary.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	0	1	opc		1	0	0	1	1	0	1	1	1	0	0	0	Zn					Zd				L

Decode fields		Instruction Details	Feature
opc	L	Instruction Details	Feature
00	0	F1CVT, F2CVT — F1CVT	FEAT_FP8
00	1	F1CVTL, F2CVTL — F1CVTL	FEAT_FP8
01	0	BF1CVT, BF2CVT — BF1CVT	FEAT_FP8
01	1	BF1CVTL, BF2CVTL — BF1CVTL	FEAT_FP8
10	0	F1CVT, F2CVT — F2CVT	FEAT_FP8
10	1	F1CVTL, F2CVTL — F2CVTL	FEAT_FP8
11	0	BF1CVT, BF2CVT — BF2CVT	FEAT_FP8
11	1	BF1CVTL, BF2CVTL — BF2CVTL	FEAT_FP8

SME2 multi-vec FRINT two registers

These instructions are under SME2 Multi-vector - SVE Constructive Unary.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	0	1	size		1	0	1	opc			1	1	1	0	0	0	Zn				0	Zd				0

Decode fields		Instruction Details	Feature
size	opc	Instruction Details	Feature
0x		UNALLOCATED	-
10	000	FRINTN	FEAT_SME2
10	001	FRINTP	FEAT_SME2
10	010	FRINTM	FEAT_SME2
10	011	UNALLOCATED	-
10	100	FRINTA	FEAT_SME2
10	101	UNALLOCATED	-
10	11x	UNALLOCATED	-
11		UNALLOCATED	-

SME2 multi-vec int down convert four registers

These instructions are under SME2 Multi-vector - SVE Constructive Unary.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	0	1	sz	op	1	1	0	0	1	1	1	1	1	0	0	0	Zn			N	U	Zd

Decode fields			Instruction Details	Feature
op	N	U	Instruction Details	Feature
0	0	0	SQCVT (four registers)	FEAT_SME2
0	0	1	UQCVT (four registers)	FEAT_SME2
0	1	0	SQCVTN	FEAT_SME2
0	1	1	UQCVTN	FEAT_SME2
1		1	UNALLOCATED	-
1	0	0	SQCVTU (four registers)	FEAT_SME2
1	1	0	SQCVTUN	FEAT_SME2

SME2 multi-vec unpack four registers

These instructions are under SME2 Multi-vector - SVE Constructive Unary.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	0	1	size		1	1	0	1	0	1	1	1	1	0	0	0	Zn				0	Zd			0	U

Decode fields	Instruction Details	Feature
U	Instruction Details	Feature
0	SUNPK	FEAT_SME2
1	UUNPK	FEAT_SME2

SME2 multi-vec ZIP four registers

These instructions are under SME2 Multi-vector - SVE Constructive Unary.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	0	1	size		1	1	0	1	1	0	1	1	1	0	0	0	Zn			0	0	Zd			op	0

Decode fields	Instruction Details	Feature
op	Instruction Details	Feature
0	ZIP (four registers)	FEAT_SME2
1	UZP (four registers)	FEAT_SME2

SME2 multi-vec FRINT four registers

These instructions are under SME2 Multi-vector - SVE Constructive Unary.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	0	1	size		1	1	1	opc			1	1	1	0	0	0	Zn			0	0	Zd			0	0

Decode fields		Instruction Details	Feature
size	opc	Instruction Details	Feature
0x		UNALLOCATED	-
10	000	FRINTN	FEAT_SME2
10	001	FRINTP	FEAT_SME2
10	010	FRINTM	FEAT_SME2
10	011	UNALLOCATED	-
10	100	FRINTA	FEAT_SME2
10	101	UNALLOCATED	-
10	11x	UNALLOCATED	-
11		UNALLOCATED	-

SME2 Multi-vector - Multiple Vectors SVE Destructive (Two registers)

These instructions are under SME encodings.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
11000001										1					0101100							op0

Decode fields	Instruction details
op0	Instruction details
000	SME2 multiple vectors int min/max two registers
001	UNALLOCATED
010	SME2 multiple vectors FP min/max two registers
011	SME2 multiple vectors FSCALE two registers
10x	SME2 multiple vectors shift two registers
11x	UNALLOCATED

SME2 multiple vectors int min/max two registers

These instructions are under SME2 Multi-vector - Multiple Vectors SVE Destructive (Two registers).

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	0	1	size		1	Zm				0	1	0	1	1	0	0	0	0	0	opc		Zdn				U

Decode fields		Instruction Details	Feature
opc	U	Instruction Details	Feature
00	0	SMAX (multiple vectors)	FEAT_SME2
00	1	UMAX (multiple vectors)	FEAT_SME2
01	0	SMIN (multiple vectors)	FEAT_SME2
01	1	UMIN (multiple vectors)	FEAT_SME2
1x		UNALLOCATED	-

SME2 multiple vectors FP min/max two registers

These instructions are under SME2 Multi-vector - Multiple Vectors SVE Destructive (Two registers).

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	0	1	size		1	Zm				0	1	0	1	1	0	0	0	1	0	opc		Zdn				o2

Decode fields			Instruction Details	Feature
size	opc	o2	Instruction Details	Feature
	10	0	FAMAX	FEAT_FAMINMAX
	10	1	FAMIN	FEAT_FAMINMAX
	11		UNALLOCATED	-
!= 00	00	0	FMAX (multiple vectors)	FEAT_SME2
!= 00	00	1	FMIN (multiple vectors)	FEAT_SME2
!= 00	01	0	FMAXNM (multiple vectors)	FEAT_SME2
!= 00	01	1	FMINNM (multiple vectors)	FEAT_SME2
00	00	0	BFMAX (multiple vectors)	FEAT_SVE_B16B16
00	00	1	BFMIN (multiple vectors)	FEAT_SVE_B16B16
00	01	0	BFMAXNM (multiple vectors)	FEAT_SVE_B16B16
00	01	1	BFMINNM (multiple vectors)	FEAT_SVE_B16B16

SME2 multiple vectors FSCALE two registers

These instructions are under SME2 Multi-vector - Multiple Vectors SVE Destructive (Two registers).

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	0	1	size		1	Zm				0	1	0	1	1	0	0	0	1	1	opc		Zdn				o2

Decode fields		Instruction Details	Feature
opc	o2	Instruction Details	Feature
00	0	FSCALE (multiple vectors)	FEAT_FP8
00	1	UNALLOCATED	-
01		UNALLOCATED	-
1x		UNALLOCATED	-

SME2 multiple vectors shift two registers

These instructions are under SME2 Multi-vector - Multiple Vectors SVE Destructive (Two registers).

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	0	1	size		1	Zm				0	1	0	1	1	0	0	1	0	opc			Zdn				U

Decode fields		Instruction Details	Feature
opc	U	Instruction Details	Feature
000		UNALLOCATED	-
001	0	SRSHL (multiple vectors)	FEAT_SME2
001	1	URSHL (multiple vectors)	FEAT_SME2
01x		UNALLOCATED	-
1xx		UNALLOCATED	-

SME2 Multi-vector - Multiple Vectors SVE Saturating Multiply (Two registers)

These instructions are under SME encodings.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
11000001										1					0101101							op0

Decode fields	Instruction details
op0	Instruction details
00000	SME2 multi-vector signed saturating doubling multiply high two registers
!= 00000	UNALLOCATED

SME2 multi-vector signed saturating doubling multiply high two registers

These instructions are under SME2 Multi-vector - Multiple Vectors SVE Saturating Multiply (Two registers).

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	0	1	size		1	Zm				0	1	0	1	1	0	1	0	0	0	0	0	Zdn				op

Decode fields	Instruction Details	Feature
op	Instruction Details	Feature
0	SQDMULH (multiple vectors)	FEAT_SME2
1	UNALLOCATED	-

SME2 Multi-vector - Multiple Vectors SVE Destructive (Four registers)

These instructions are under SME encodings.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
11000001										1				00101110								op0								0

Decode fields	Instruction details
op0	Instruction details
000	SME2 multiple vectors int min/max four registers
001	UNALLOCATED
010	SME2 multiple vectors FP min/max four registers
011	SME2 multiple vectors FSCALE four registers
10x	SME2 multiple vectors shift four registers
11x	UNALLOCATED

SME2 multiple vectors int min/max four registers

These instructions are under SME2 Multi-vector - Multiple Vectors SVE Destructive (Four registers).

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	0	1	size		1	Zm			0	0	1	0	1	1	1	0	0	0	0	opc		Zdn			0	U

Decode fields		Instruction Details	Feature
opc	U	Instruction Details	Feature
00	0	SMAX (multiple vectors)	FEAT_SME2
00	1	UMAX (multiple vectors)	FEAT_SME2
01	0	SMIN (multiple vectors)	FEAT_SME2
01	1	UMIN (multiple vectors)	FEAT_SME2
1x		UNALLOCATED	-

SME2 multiple vectors FP min/max four registers

These instructions are under SME2 Multi-vector - Multiple Vectors SVE Destructive (Four registers).

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	0	1	size		1	Zm			0	0	1	0	1	1	1	0	0	1	0	opc		Zdn			0	o2

Decode fields			Instruction Details	Feature
size	opc	o2	Instruction Details	Feature
	10	0	FAMAX	FEAT_FAMINMAX
	10	1	FAMIN	FEAT_FAMINMAX
	11		UNALLOCATED	-
!= 00	00	0	FMAX (multiple vectors)	FEAT_SME2
!= 00	00	1	FMIN (multiple vectors)	FEAT_SME2
!= 00	01	0	FMAXNM (multiple vectors)	FEAT_SME2
!= 00	01	1	FMINNM (multiple vectors)	FEAT_SME2
00	00	0	BFMAX (multiple vectors)	FEAT_SVE_B16B16
00	00	1	BFMIN (multiple vectors)	FEAT_SVE_B16B16
00	01	0	BFMAXNM (multiple vectors)	FEAT_SVE_B16B16
00	01	1	BFMINNM (multiple vectors)	FEAT_SVE_B16B16

SME2 multiple vectors FSCALE four registers

These instructions are under SME2 Multi-vector - Multiple Vectors SVE Destructive (Four registers).

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	0	1	size		1	Zm			0	0	1	0	1	1	1	0	0	1	1	opc		Zdn			0	o2

Decode fields		Instruction Details	Feature
opc	o2	Instruction Details	Feature
00	0	FSCALE (multiple vectors)	FEAT_FP8
00	1	UNALLOCATED	-
01		UNALLOCATED	-
1x		UNALLOCATED	-

SME2 multiple vectors shift four registers

These instructions are under SME2 Multi-vector - Multiple Vectors SVE Destructive (Four registers).

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	0	1	size		1	Zm			0	0	1	0	1	1	1	0	1	0	opc			Zdn			0	U

Decode fields		Instruction Details	Feature
opc	U	Instruction Details	Feature
000		UNALLOCATED	-
001	0	SRSHL (multiple vectors)	FEAT_SME2
001	1	URSHL (multiple vectors)	FEAT_SME2
01x		UNALLOCATED	-
1xx		UNALLOCATED	-

SME2 Multi-vector - Multiple Vectors SVE Saturating Multiply (Four registers)

These instructions are under SME encodings.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
11000001										1				00101111								op0								0

Decode fields	Instruction details
op0	Instruction details
00000	SME2 multi-vector signed saturating doubling multiply high four registers
!= 00000	UNALLOCATED

SME2 multi-vector signed saturating doubling multiply high four registers

These instructions are under SME2 Multi-vector - Multiple Vectors SVE Saturating Multiply (Four registers).

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	0	1	size		1	Zm			0	0	1	0	1	1	1	1	0	0	0	0	0	Zdn			0	op

Decode fields	Instruction Details	Feature
op	Instruction Details	Feature
0	SQDMULH (multiple vectors)	FEAT_SME2
1	UNALLOCATED	-

SME2 Multi-vector - Multiple and Single SVE Destructive (Two registers)

These instructions are under SME encodings.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
11000001										10						10100					op0	op1		op2

Decode fields			Instruction details
op0	op1	op2	Instruction details
0	00	00x	SME2 single-multi int min/max two registers
0	01	00x	SME2 single-multi FP min/max two registers
0	01	100	SME2 multiple and single vector FSCALE two registers
0	01	101	UNALLOCATED
0	01	x1x	UNALLOCATED
0	10		SME2 single-multi shift two registers
0	11	000	SME2 single-multi add two registers
0	11	!= 000	UNALLOCATED
1	00	000	SME2 single-multi signed saturating doubling multiply high two registers
1	00	001	UNALLOCATED
1	!= 00		UNALLOCATED
	00	!= 00x	UNALLOCATED

SME2 single-multi int min/max two registers

These instructions are under SME2 Multi-vector - Multiple and Single SVE Destructive (Two registers).

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	0	1	size		1	0	Zm				1	0	1	0	0	0	0	0	0	0	op	Zdn				U

Decode fields		Instruction Details	Feature
op	U	Instruction Details	Feature
0	0	SMAX (multiple and single vector)	FEAT_SME2
0	1	UMAX (multiple and single vector)	FEAT_SME2
1	0	SMIN (multiple and single vector)	FEAT_SME2
1	1	UMIN (multiple and single vector)	FEAT_SME2

SME2 single-multi FP min/max two registers

These instructions are under SME2 Multi-vector - Multiple and Single SVE Destructive (Two registers).

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	0	1	size		1	0	Zm				1	0	1	0	0	0	0	1	0	0	op	Zdn				o2

Decode fields			Instruction Details	Feature
size	op	o2	Instruction Details	Feature
!= 00	0	0	FMAX (multiple and single vector)	FEAT_SME2
!= 00	0	1	FMIN (multiple and single vector)	FEAT_SME2
!= 00	1	0	FMAXNM (multiple and single vector)	FEAT_SME2
!= 00	1	1	FMINNM (multiple and single vector)	FEAT_SME2
00	0	0	BFMAX (multiple and single vector)	FEAT_SVE_B16B16
00	0	1	BFMIN (multiple and single vector)	FEAT_SVE_B16B16
00	1	0	BFMAXNM (multiple and single vector)	FEAT_SVE_B16B16
00	1	1	BFMINNM (multiple and single vector)	FEAT_SVE_B16B16

SME2 multiple and single vector FSCALE two registers

These instructions are under SME2 Multi-vector - Multiple and Single SVE Destructive (Two registers).

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	0	1	size		1	0	Zm				1	0	1	0	0	0	0	1	1	0	0	Zdn				op

Decode fields	Instruction Details	Feature
op	Instruction Details	Feature
0	FSCALE (multiple and single vector)	FEAT_FP8
1	UNALLOCATED	-

SME2 single-multi shift two registers

These instructions are under SME2 Multi-vector - Multiple and Single SVE Destructive (Two registers).

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	0	1	size		1	0	Zm				1	0	1	0	0	0	1	0	opc			Zdn				U

Decode fields		Instruction Details	Feature
opc	U	Instruction Details	Feature
000		UNALLOCATED	-
001	0	SRSHL (multiple and single vector)	FEAT_SME2
001	1	URSHL (multiple and single vector)	FEAT_SME2
01x		UNALLOCATED	-
1xx		UNALLOCATED	-

SME2 single-multi add two registers

These instructions are under SME2 Multi-vector - Multiple and Single SVE Destructive (Two registers).

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	0	1	size		1	0	Zm				1	0	1	0	0	0	1	1	0	0	0	Zdn				op

Decode fields	Instruction Details	Feature
op	Instruction Details	Feature
0	ADD (to vector)	FEAT_SME2
1	UNALLOCATED	-

SME2 single-multi signed saturating doubling multiply high two registers

These instructions are under SME2 Multi-vector - Multiple and Single SVE Destructive (Two registers).

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	0	1	size		1	0	Zm				1	0	1	0	0	1	0	0	0	0	0	Zdn				op

Decode fields	Instruction Details	Feature
op	Instruction Details	Feature
0	SQDMULH (multiple and single vector)	FEAT_SME2
1	UNALLOCATED	-

SME2 Multi-vector - Multiple and Single SVE Destructive (Four registers)

These instructions are under SME encodings.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
11000001										10						10101					op0	op1		op2						0

Decode fields			Instruction details
op0	op1	op2	Instruction details
0	00	00x	SME2 single-multi int min/max four registers
0	01	00x	SME2 single-multi FP min/max four registers
0	01	100	SME2 multiple and single vector FSCALE four registers
0	01	101	UNALLOCATED
0	01	x1x	UNALLOCATED
0	10		SME2 single-multi shift four registers
0	11	000	SME2 single-multi add four registers
0	11	!= 000	UNALLOCATED
1	00	000	SME2 single-multi signed saturating doubling multiply high four registers
1	00	001	UNALLOCATED
1	!= 00		UNALLOCATED
	00	!= 00x	UNALLOCATED

SME2 single-multi int min/max four registers

These instructions are under SME2 Multi-vector - Multiple and Single SVE Destructive (Four registers).

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	0	1	size		1	0	Zm				1	0	1	0	1	0	0	0	0	0	op	Zdn			0	U

Decode fields		Instruction Details	Feature
op	U	Instruction Details	Feature
0	0	SMAX (multiple and single vector)	FEAT_SME2
0	1	UMAX (multiple and single vector)	FEAT_SME2
1	0	SMIN (multiple and single vector)	FEAT_SME2
1	1	UMIN (multiple and single vector)	FEAT_SME2

SME2 single-multi FP min/max four registers

These instructions are under SME2 Multi-vector - Multiple and Single SVE Destructive (Four registers).

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	0	1	size		1	0	Zm				1	0	1	0	1	0	0	1	0	0	op	Zdn			0	o2

Decode fields			Instruction Details	Feature
size	op	o2	Instruction Details	Feature
!= 00	0	0	FMAX (multiple and single vector)	FEAT_SME2
!= 00	0	1	FMIN (multiple and single vector)	FEAT_SME2
!= 00	1	0	FMAXNM (multiple and single vector)	FEAT_SME2
!= 00	1	1	FMINNM (multiple and single vector)	FEAT_SME2
00	0	0	BFMAX (multiple and single vector)	FEAT_SVE_B16B16
00	0	1	BFMIN (multiple and single vector)	FEAT_SVE_B16B16
00	1	0	BFMAXNM (multiple and single vector)	FEAT_SVE_B16B16
00	1	1	BFMINNM (multiple and single vector)	FEAT_SVE_B16B16

SME2 multiple and single vector FSCALE four registers

These instructions are under SME2 Multi-vector - Multiple and Single SVE Destructive (Four registers).

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	0	1	size		1	0	Zm				1	0	1	0	1	0	0	1	1	0	0	Zdn			0	op

Decode fields	Instruction Details	Feature
op	Instruction Details	Feature
0	FSCALE (multiple and single vector)	FEAT_FP8
1	UNALLOCATED	-

SME2 single-multi shift four registers

These instructions are under SME2 Multi-vector - Multiple and Single SVE Destructive (Four registers).

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	0	1	size		1	0	Zm				1	0	1	0	1	0	1	0	opc			Zdn			0	U

Decode fields		Instruction Details	Feature
opc	U	Instruction Details	Feature
000		UNALLOCATED	-
001	0	SRSHL (multiple and single vector)	FEAT_SME2
001	1	URSHL (multiple and single vector)	FEAT_SME2
01x		UNALLOCATED	-
1xx		UNALLOCATED	-

SME2 single-multi add four registers

These instructions are under SME2 Multi-vector - Multiple and Single SVE Destructive (Four registers).

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	0	1	size		1	0	Zm				1	0	1	0	1	0	1	1	0	0	0	Zdn			0	op

Decode fields	Instruction Details	Feature
op	Instruction Details	Feature
0	ADD (to vector)	FEAT_SME2
1	UNALLOCATED	-

SME2 single-multi signed saturating doubling multiply high four registers

These instructions are under SME2 Multi-vector - Multiple and Single SVE Destructive (Four registers).

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	0	1	size		1	0	Zm				1	0	1	0	1	1	0	0	0	0	0	Zdn			0	op

Decode fields	Instruction Details	Feature
op	Instruction Details	Feature
0	SQDMULH (multiple and single vector)	FEAT_SME2
1	UNALLOCATED	-

SME2 Multi-vector - Multiple and Single Array Vectors (Two registers)

These instructions are under SME encodings.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
110000010									op0	10						0			op1								op2			op3

Decode fields				Instruction details	Feature
op0	op1	op2	op3	Instruction details	Feature
0	000	000	1	FMLALL (multiple and single vector) — Two ZA quad-vectors	FEAT_SME_F8F32
0	000	!= 000	1	UNALLOCATED	-
0	010			SME2 single-multi long FMA two sources	-
0	011			SME2 multiple and single vector long FMA one source	-
0	100			SME2 single-multi FP dot product two registers	-
0	101	x1x		SME2 single-multi mixed dot product two registers	-
1	000		1	UNALLOCATED	-
1	010			SME2 single-multi long MLA two sources	-
1	011			SME2 multiple and single vector long MLA one source	-
1	100			UNALLOCATED	-
1	101	x1x		SME2 single-multi two-way dot product two registers	-
	000		0	SME2 single-multi long long MLA two sources	-
	001			SME2 multiple and single vector long long FMA one source	-
	101	x0x		SME2 single-multi four-way dot product two registers	-
	110	0xx		SME2 single-multi ternary FP two registers	-
	110	1xx		SME2 single-multi ternary int two registers	-
	111	0xx		SME2 single-multi ternary FP16 two registers	-
	111	1xx		UNALLOCATED	-

SME2 single-multi long FMA two sources

These instructions are under SME2 Multi-vector - Multiple and Single Array Vectors (Two registers).

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	0	1	0	0	1	0	Zm				0	Rv		0	1	0	Zn					op	S	o2	off2

Decode fields			Instruction Details	Feature
op	S	o2	Instruction Details	Feature
0	0	0	FMLAL (multiple and single vector, FP16 to FP32)	FEAT_SME2
0	0	1	FMLAL (multiple and single vector, FP8 to FP16)	FEAT_SME_F8F16
0	1	0	FMLSL (multiple and single vector)	FEAT_SME2
0	1	1	UNALLOCATED	-
1		1	UNALLOCATED	-
1	0	0	BFMLAL (multiple and single vector)	FEAT_SME2
1	1	0	BFMLSL (multiple and single vector)	FEAT_SME2

SME2 multiple and single vector long FMA one source

These instructions are under SME2 Multi-vector - Multiple and Single Array Vectors (Two registers).

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	0	1	0	0	1	0	Zm				0	Rv		0	1	1	Zn					op	S	off3

Decode fields		Instruction Details	Feature
op	S	Instruction Details	Feature
0	0	FMLAL (multiple and single vector, FP16 to FP32)	FEAT_SME2
0	1	FMLSL (multiple and single vector)	FEAT_SME2
1	0	BFMLAL (multiple and single vector)	FEAT_SME2
1	1	BFMLSL (multiple and single vector)	FEAT_SME2

SME2 single-multi FP dot product two registers

These instructions are under SME2 Multi-vector - Multiple and Single Array Vectors (Two registers).

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	0	1	0	0	1	0	Zm				0	Rv		1	0	0	Zn					opc		off3

Decode fields	Instruction Details	Feature
opc	Instruction Details	Feature
00	FDOT (2-way, multiple and single vector, FP16 to FP32)	FEAT_SME2
01	FDOT (2-way, multiple and single vector, FP8 to FP16)	FEAT_SME_F8F16
10	BFDOT (multiple and single vector)	FEAT_SME2
11	FDOT (4-way, multiple and single vector)	FEAT_SME_F8F32

SME2 single-multi mixed dot product two registers

These instructions are under SME2 Multi-vector - Multiple and Single Array Vectors (Two registers).

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	0	1	0	0	1	0	Zm				0	Rv		1	0	1	Zn					U	1	off3

Decode fields	Instruction Details	Feature
U	Instruction Details	Feature
0	USDOT (multiple and single vector)	FEAT_SME2
1	SUDOT (multiple and single vector)	FEAT_SME2

SME2 single-multi long MLA two sources

These instructions are under SME2 Multi-vector - Multiple and Single Array Vectors (Two registers).

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	0	1	0	1	1	0	Zm				0	Rv		0	1	0	Zn					U	S	op	off2

Decode fields			Instruction Details	Feature
U	S	op	Instruction Details	Feature
		1	UNALLOCATED	-
0	0	0	SMLAL (multiple and single vector)	FEAT_SME2
0	1	0	SMLSL (multiple and single vector)	FEAT_SME2
1	0	0	UMLAL (multiple and single vector)	FEAT_SME2
1	1	0	UMLSL (multiple and single vector)	FEAT_SME2

SME2 multiple and single vector long MLA one source

These instructions are under SME2 Multi-vector - Multiple and Single Array Vectors (Two registers).

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	0	1	0	1	1	0	Zm				0	Rv		0	1	1	Zn					U	S	off3

Decode fields		Instruction Details	Feature
U	S	Instruction Details	Feature
0	0	SMLAL (multiple and single vector)	FEAT_SME2
0	1	SMLSL (multiple and single vector)	FEAT_SME2
1	0	UMLAL (multiple and single vector)	FEAT_SME2
1	1	UMLSL (multiple and single vector)	FEAT_SME2

SME2 single-multi two-way dot product two registers

These instructions are under SME2 Multi-vector - Multiple and Single Array Vectors (Two registers).

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	0	1	0	1	1	0	Zm				0	Rv		1	0	1	Zn					U	1	off3

Decode fields	Instruction Details	Feature
U	Instruction Details	Feature
0	SDOT (2-way, multiple and single vector)	FEAT_SME2
1	UDOT (2-way, multiple and single vector)	FEAT_SME2

SME2 single-multi long long MLA two sources

These instructions are under SME2 Multi-vector - Multiple and Single Array Vectors (Two registers).

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	0	1	0	sz	1	0	Zm				0	Rv		0	0	0	Zn					U	S	op	0	o1

Decode fields				Instruction Details	Feature
sz	U	S	op	Instruction Details	Feature
	0	0	0	SMLALL (multiple and single vector)	FEAT_SME2
	0	1	0	SMLSLL (multiple and single vector)	FEAT_SME2
	1	0	0	UMLALL (multiple and single vector)	FEAT_SME2
	1	1	0	UMLSLL (multiple and single vector)	FEAT_SME2
0		1	1	UNALLOCATED	-
0	0	0	1	USMLALL (multiple and single vector)	FEAT_SME2
0	1	0	1	SUMLALL (multiple and single vector)	FEAT_SME2
1			1	UNALLOCATED	-

SME2 multiple and single vector long long FMA one source

These instructions are under SME2 Multi-vector - Multiple and Single Array Vectors (Two registers).

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	0	1	0	sz	1	0	Zm				0	Rv		0	0	1	Zn					U	S	op	off2

Decode fields				Instruction Details	Feature
sz	U	S	op	Instruction Details	Feature
	0	0	0	SMLALL (multiple and single vector)	FEAT_SME2
	0	1	0	SMLSLL (multiple and single vector)	FEAT_SME2
	1	0	0	UMLALL (multiple and single vector)	FEAT_SME2
	1	1	0	UMLSLL (multiple and single vector)	FEAT_SME2
0	0	0	1	USMLALL (multiple and single vector)	FEAT_SME2
0	0	1	1	UNALLOCATED	-
0	1		1	UNALLOCATED	-
1			1	UNALLOCATED	-

SME2 single-multi four-way dot product two registers

These instructions are under SME2 Multi-vector - Multiple and Single Array Vectors (Two registers).

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	0	1	0	sz	1	0	Zm				0	Rv		1	0	1	Zn					U	0	off3

Decode fields	Instruction Details	Feature
U	Instruction Details	Feature
0	SDOT (4-way, multiple and single vector)	FEAT_SME2
1	UDOT (4-way, multiple and single vector)	FEAT_SME2

SME2 single-multi ternary FP two registers

These instructions are under SME2 Multi-vector - Multiple and Single Array Vectors (Two registers).

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	0	1	0	sz	1	0	Zm				0	Rv		1	1	0	Zn					0	S	off3

Decode fields	Instruction Details	Feature
S	Instruction Details	Feature
0	FMLA (multiple and single vector)	FEAT_SME2
1	FMLS (multiple and single vector)	FEAT_SME2

SME2 single-multi ternary int two registers

These instructions are under SME2 Multi-vector - Multiple and Single Array Vectors (Two registers).

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	0	1	0	sz	1	0	Zm				0	Rv		1	1	0	Zn					1	S	off3

Decode fields	Instruction Details	Feature
S	Instruction Details	Feature
0	ADD (array results, multiple and single vector)	FEAT_SME2
1	SUB (array results, multiple and single vector)	FEAT_SME2

SME2 single-multi ternary FP16 two registers

These instructions are under SME2 Multi-vector - Multiple and Single Array Vectors (Two registers).

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	0	1	0	sz	1	0	Zm				0	Rv		1	1	1	Zn					0	S	off3

Decode fields		Instruction Details	Feature
sz	S	Instruction Details	Feature
0	0	FMLA (multiple and single vector)	FEAT_SME_F16F16
0	1	FMLS (multiple and single vector)	FEAT_SME_F16F16
1	0	BFMLA (multiple and single vector)	FEAT_SVE_B16B16
1	1	BFMLS (multiple and single vector)	FEAT_SVE_B16B16

SME2 Multi-vector - Multiple and Single Array Vectors (Four registers)

These instructions are under SME encodings.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
110000010									op0	11						0			op1								op2			op3

Decode fields				Instruction details	Feature
op0	op1	op2	op3	Instruction details	Feature
0	000	000	1	FMLALL (multiple and single vector) — Four ZA quad-vectors	FEAT_SME_F8F32
0	000	!= 000	1	UNALLOCATED	-
0	001	000		FMLALL (multiple and single vector) — One ZA quad-vector	FEAT_SME_F8F32
0	001	001		UNALLOCATED	-
0	010			SME2 single-multi long FMA four sources	-
0	011	00x		FMLAL (multiple and single vector, FP8 to FP16) — One ZA double-vector	FEAT_SME_F8F16
0	0x1	!= 00x		UNALLOCATED	-
0	100			SME2 single-multi FP dot product four registers	-
0	101	x1x		SME2 single-multi mixed dot product four registers	-
1	000		1	UNALLOCATED	-
1	010			SME2 single-multi long MLA four sources	-
1	0x1			UNALLOCATED	-
1	100			UNALLOCATED	-
1	101	x1x		SME2 single-multi two-way dot product four registers	-
	000		0	SME2 single-multi long long MLA four sources	-
	101	x0x		SME2 single-multi four-way dot product four registers	-
	110	0xx		SME2 single-multi ternary FP four registers	-
	110	1xx		SME2 single-multi ternary int four registers	-
	111	0xx		SME2 single-multi ternary FP16 four registers	-
	111	1xx		UNALLOCATED	-

SME2 single-multi long FMA four sources

These instructions are under SME2 Multi-vector - Multiple and Single Array Vectors (Four registers).

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	0	1	0	0	1	1	Zm				0	Rv		0	1	0	Zn					op	S	o2	off2

Decode fields			Instruction Details	Feature
op	S	o2	Instruction Details	Feature
0	0	0	FMLAL (multiple and single vector, FP16 to FP32)	FEAT_SME2
0	0	1	FMLAL (multiple and single vector, FP8 to FP16)	FEAT_SME_F8F16
0	1	0	FMLSL (multiple and single vector)	FEAT_SME2
0	1	1	UNALLOCATED	-
1		1	UNALLOCATED	-
1	0	0	BFMLAL (multiple and single vector)	FEAT_SME2
1	1	0	BFMLSL (multiple and single vector)	FEAT_SME2

SME2 single-multi FP dot product four registers

These instructions are under SME2 Multi-vector - Multiple and Single Array Vectors (Four registers).

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	0	1	0	0	1	1	Zm				0	Rv		1	0	0	Zn					opc		off3

Decode fields	Instruction Details	Feature
opc	Instruction Details	Feature
00	FDOT (2-way, multiple and single vector, FP16 to FP32)	FEAT_SME2
01	FDOT (2-way, multiple and single vector, FP8 to FP16)	FEAT_SME_F8F16
10	BFDOT (multiple and single vector)	FEAT_SME2
11	FDOT (4-way, multiple and single vector)	FEAT_SME_F8F32

SME2 single-multi mixed dot product four registers

These instructions are under SME2 Multi-vector - Multiple and Single Array Vectors (Four registers).

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	0	1	0	0	1	1	Zm				0	Rv		1	0	1	Zn					U	1	off3

Decode fields	Instruction Details	Feature
U	Instruction Details	Feature
0	USDOT (multiple and single vector)	FEAT_SME2
1	SUDOT (multiple and single vector)	FEAT_SME2

SME2 single-multi long MLA four sources

These instructions are under SME2 Multi-vector - Multiple and Single Array Vectors (Four registers).

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	0	1	0	1	1	1	Zm				0	Rv		0	1	0	Zn					U	S	op	off2

Decode fields			Instruction Details	Feature
U	S	op	Instruction Details	Feature
		1	UNALLOCATED	-
0	0	0	SMLAL (multiple and single vector)	FEAT_SME2
0	1	0	SMLSL (multiple and single vector)	FEAT_SME2
1	0	0	UMLAL (multiple and single vector)	FEAT_SME2
1	1	0	UMLSL (multiple and single vector)	FEAT_SME2

SME2 single-multi two-way dot product four registers

These instructions are under SME2 Multi-vector - Multiple and Single Array Vectors (Four registers).

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	0	1	0	1	1	1	Zm				0	Rv		1	0	1	Zn					U	1	off3

Decode fields	Instruction Details	Feature
U	Instruction Details	Feature
0	SDOT (2-way, multiple and single vector)	FEAT_SME2
1	UDOT (2-way, multiple and single vector)	FEAT_SME2

SME2 single-multi long long MLA four sources

These instructions are under SME2 Multi-vector - Multiple and Single Array Vectors (Four registers).

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	0	1	0	sz	1	1	Zm				0	Rv		0	0	0	Zn					U	S	op	0	o1

Decode fields				Instruction Details	Feature
sz	U	S	op	Instruction Details	Feature
	0	0	0	SMLALL (multiple and single vector)	FEAT_SME2
	0	1	0	SMLSLL (multiple and single vector)	FEAT_SME2
	1	0	0	UMLALL (multiple and single vector)	FEAT_SME2
	1	1	0	UMLSLL (multiple and single vector)	FEAT_SME2
0		1	1	UNALLOCATED	-
0	0	0	1	USMLALL (multiple and single vector)	FEAT_SME2
0	1	0	1	SUMLALL (multiple and single vector)	FEAT_SME2
1			1	UNALLOCATED	-

SME2 single-multi four-way dot product four registers

These instructions are under SME2 Multi-vector - Multiple and Single Array Vectors (Four registers).

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	0	1	0	sz	1	1	Zm				0	Rv		1	0	1	Zn					U	0	off3

Decode fields	Instruction Details	Feature
U	Instruction Details	Feature
0	SDOT (4-way, multiple and single vector)	FEAT_SME2
1	UDOT (4-way, multiple and single vector)	FEAT_SME2

SME2 single-multi ternary FP four registers

These instructions are under SME2 Multi-vector - Multiple and Single Array Vectors (Four registers).

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	0	1	0	sz	1	1	Zm				0	Rv		1	1	0	Zn					0	S	off3

Decode fields	Instruction Details	Feature
S	Instruction Details	Feature
0	FMLA (multiple and single vector)	FEAT_SME2
1	FMLS (multiple and single vector)	FEAT_SME2

SME2 single-multi ternary int four registers

These instructions are under SME2 Multi-vector - Multiple and Single Array Vectors (Four registers).

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	0	1	0	sz	1	1	Zm				0	Rv		1	1	0	Zn					1	S	off3

Decode fields	Instruction Details	Feature
S	Instruction Details	Feature
0	ADD (array results, multiple and single vector)	FEAT_SME2
1	SUB (array results, multiple and single vector)	FEAT_SME2

SME2 single-multi ternary FP16 four registers

These instructions are under SME2 Multi-vector - Multiple and Single Array Vectors (Four registers).

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	0	1	0	sz	1	1	Zm				0	Rv		1	1	1	Zn					0	S	off3

Decode fields		Instruction Details	Feature
sz	S	Instruction Details	Feature
0	0	FMLA (multiple and single vector)	FEAT_SME_F16F16
0	1	FMLS (multiple and single vector)	FEAT_SME_F16F16
1	0	BFMLA (multiple and single vector)	FEAT_SVE_B16B16
1	1	BFMLS (multiple and single vector)	FEAT_SVE_B16B16

SME2 Multi-vector - Multiple Array Vectors (Two registers)

These instructions are under SME encodings.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
110000011									op0	1	op1		op2		00				op3							op4	op5			op6

Decode fields							Instruction details	Feature
op0	op1	op2	op3	op4	op5	op6	Instruction details	Feature
0	00	x0	11x	1			UNALLOCATED	-
0			000	1	000	0	FMLALL (multiple vectors) — Two ZA quad-vectors	FEAT_SME_F8F32
0			000	1	000	1	UNALLOCATED	-
0			010	0	xx0		SME2 multiple vectors long FMA two sources	-
0			010	1	000		FMLAL (multiple vectors, FP8 to FP16) — Two ZA double-vectors	FEAT_SME_F8F16
0			0x0	1	!= 000		UNALLOCATED	-
0			100	1	x1x		UNALLOCATED	-
0			100		x0x		SME2 multiple vectors FP dot product two registers	-
0			101	0	01x		USDOT (multiple vectors) — Two ZA single-vectors	FEAT_SME2
0			101	0	11x		UNALLOCATED	-
0			101	1			UNALLOCATED	-
1	00	x0	1xx	1			UNALLOCATED	-
1	00	x1	10x	1			UNALLOCATED	-
1	!= 00		10x	1			UNALLOCATED	-
1			010	0	xx0		SME2 multiple vectors long MLA two sources	-
1			0x0	1			UNALLOCATED	-
1			100	0	x0x		UNALLOCATED	-
1			101	0	x1x		SME2 multiple vectors two-way dot product two registers	-
	00	00	111	0	0xx		SME2 multiple vectors binary FP two registers	-
	00	00	111	0	1xx		SME2 multiple vectors binary int two registers	-
	00	10	111	0	0xx		SME2 multiple vectors binary FP16 two registers	-
	00	10	111	0	1xx		UNALLOCATED	-
	00	x1	110	1			UNALLOCATED	-
	00	x1	111				UNALLOCATED	-
	!= 00		110	1			UNALLOCATED	-
	!= 00		111				UNALLOCATED	-
			000	0		0	SME2 multiple vectors long long MLA two sources	-
			000	0		1	UNALLOCATED	-
			010	0	xx1		UNALLOCATED	-
			0x1				UNALLOCATED	-
			100	0	x1x		SME2 multiple vectors ternary FP16 two registers	-
			101	0	x0x		SME2 multiple vectors four-way dot product two registers	-
			110	0	0xx		SME2 multiple vectors ternary FP two registers	-
			110	0	1xx		SME2 multiple vectors ternary int two registers	-

SME2 multiple vectors long FMA two sources

These instructions are under SME2 Multi-vector - Multiple Array Vectors (Two registers).

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	0	1	1	0	1	Zm				0	0	Rv		0	1	0	Zn				0	op	S	0	off2

Decode fields		Instruction Details	Feature
op	S	Instruction Details	Feature
0	0	FMLAL (multiple vectors, FP16 to FP32)	FEAT_SME2
0	1	FMLSL (multiple vectors)	FEAT_SME2
1	0	BFMLAL (multiple vectors)	FEAT_SME2
1	1	BFMLSL (multiple vectors)	FEAT_SME2

SME2 multiple vectors FP dot product two registers

These instructions are under SME2 Multi-vector - Multiple Array Vectors (Two registers).

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	0	1	1	0	1	Zm				0	0	Rv		1	0	0	Zn				opc		0	off3

Decode fields	Instruction Details	Feature
opc	Instruction Details	Feature
00	FDOT (2-way, multiple vectors, FP16 to FP32)	FEAT_SME2
01	BFDOT (multiple vectors)	FEAT_SME2
10	FDOT (2-way, multiple vectors, FP8 to FP16)	FEAT_SME_F8F16
11	FDOT (4-way, multiple vectors)	FEAT_SME_F8F32

SME2 multiple vectors long MLA two sources

These instructions are under SME2 Multi-vector - Multiple Array Vectors (Two registers).

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	0	1	1	1	1	Zm				0	0	Rv		0	1	0	Zn				0	U	S	0	off2

Decode fields		Instruction Details	Feature
U	S	Instruction Details	Feature
0	0	SMLAL (multiple vectors)	FEAT_SME2
0	1	SMLSL (multiple vectors)	FEAT_SME2
1	0	UMLAL (multiple vectors)	FEAT_SME2
1	1	UMLSL (multiple vectors)	FEAT_SME2

SME2 multiple vectors two-way dot product two registers

These instructions are under SME2 Multi-vector - Multiple Array Vectors (Two registers).

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	0	1	1	1	1	Zm				0	0	Rv		1	0	1	Zn				0	U	1	off3

Decode fields	Instruction Details	Feature
U	Instruction Details	Feature
0	SDOT (2-way, multiple vectors)	FEAT_SME2
1	UDOT (2-way, multiple vectors)	FEAT_SME2

SME2 multiple vectors binary FP two registers

These instructions are under SME2 Multi-vector - Multiple Array Vectors (Two registers).

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	0	1	1	sz	1	0	0	0	0	0	0	Rv		1	1	1	Zm				0	0	S	off3

Decode fields	Instruction Details	Feature
S	Instruction Details	Feature
0	FADD	FEAT_SME2
1	FSUB	FEAT_SME2

SME2 multiple vectors binary int two registers

These instructions are under SME2 Multi-vector - Multiple Array Vectors (Two registers).

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	0	1	1	sz	1	0	0	0	0	0	0	Rv		1	1	1	Zm				0	1	S	off3

Decode fields	Instruction Details	Feature
S	Instruction Details	Feature
0	ADD (array accumulators)	FEAT_SME2
1	SUB (array accumulators)	FEAT_SME2

SME2 multiple vectors binary FP16 two registers

These instructions are under SME2 Multi-vector - Multiple Array Vectors (Two registers).

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	0	1	1	sz	1	0	0	1	0	0	0	Rv		1	1	1	Zm				0	0	S	off3

Decode fields		Instruction Details	Feature
sz	S	Instruction Details	Feature
0	0	FADD	FEAT_SME_F16F16
0	1	FSUB	FEAT_SME_F16F16
1	0	BFADD	FEAT_SVE_B16B16
1	1	BFSUB	FEAT_SVE_B16B16

SME2 multiple vectors long long MLA two sources

These instructions are under SME2 Multi-vector - Multiple Array Vectors (Two registers).

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	0	1	1	sz	1	Zm				0	0	Rv		0	0	0	Zn				0	U	S	op	0	o1

Decode fields				Instruction Details	Feature
sz	U	S	op	Instruction Details	Feature
	0	0	0	SMLALL (multiple vectors)	FEAT_SME2
	0	1	0	SMLSLL (multiple vectors)	FEAT_SME2
	1	0	0	UMLALL (multiple vectors)	FEAT_SME2
	1	1	0	UMLSLL (multiple vectors)	FEAT_SME2
0	0	0	1	USMLALL (multiple vectors)	FEAT_SME2
0	0	1	1	UNALLOCATED	-
0	1		1	UNALLOCATED	-
1			1	UNALLOCATED	-

SME2 multiple vectors ternary FP16 two registers

These instructions are under SME2 Multi-vector - Multiple Array Vectors (Two registers).

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	0	1	1	sz	1	Zm				0	0	Rv		1	0	0	Zn				0	S	1	off3

Decode fields		Instruction Details	Feature
sz	S	Instruction Details	Feature
0	0	FMLA (multiple vectors)	FEAT_SME_F16F16
0	1	FMLS (multiple vectors)	FEAT_SME_F16F16
1	0	BFMLA (multiple vectors)	FEAT_SVE_B16B16
1	1	BFMLS (multiple vectors)	FEAT_SVE_B16B16

SME2 multiple vectors four-way dot product two registers

These instructions are under SME2 Multi-vector - Multiple Array Vectors (Two registers).

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	0	1	1	sz	1	Zm				0	0	Rv		1	0	1	Zn				0	U	0	off3

Decode fields	Instruction Details	Feature
U	Instruction Details	Feature
0	SDOT (4-way, multiple vectors)	FEAT_SME2
1	UDOT (4-way, multiple vectors)	FEAT_SME2

SME2 multiple vectors ternary FP two registers

These instructions are under SME2 Multi-vector - Multiple Array Vectors (Two registers).

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	0	1	1	sz	1	Zm				0	0	Rv		1	1	0	Zn				0	0	S	off3

Decode fields	Instruction Details	Feature
S	Instruction Details	Feature
0	FMLA (multiple vectors)	FEAT_SME2
1	FMLS (multiple vectors)	FEAT_SME2

SME2 multiple vectors ternary int two registers

These instructions are under SME2 Multi-vector - Multiple Array Vectors (Two registers).

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	0	1	1	sz	1	Zm				0	0	Rv		1	1	0	Zn				0	1	S	off3

Decode fields	Instruction Details	Feature
S	Instruction Details	Feature
0	ADD (array results, multiple vectors)	FEAT_SME2
1	SUB (array results, multiple vectors)	FEAT_SME2

SME2 Multi-vector - Multiple Array Vectors (Four registers)

These instructions are under SME encodings.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
110000011									op0	1	op1		op2		10				op3						op4		op5			op6

Decode fields							Instruction details	Feature
op0	op1	op2	op3	op4	op5	op6	Instruction details	Feature
0	00	x0	11x	01			UNALLOCATED	-
0		x0	000	01	000	0	FMLALL (multiple vectors) — Four ZA quad-vectors	FEAT_SME_F8F32
0		x0	000	01	000	1	UNALLOCATED	-
0		x0	010	00	xx0		SME2 multiple vectors long FMA four sources	-
0		x0	010	01	000		FMLAL (multiple vectors, FP8 to FP16) — Four ZA double-vectors	FEAT_SME_F8F16
0		x0	0x0	01	!= 000		UNALLOCATED	-
0		x0	100	01	x1x		UNALLOCATED	-
0		x0	100	0x	x0x		SME2 multiple vectors FP dot product four registers	-
0		x0	101	00	01x		USDOT (multiple vectors) — Four ZA single-vectors	FEAT_SME2
0		x0	101	00	11x		UNALLOCATED	-
0		x0	101	01			UNALLOCATED	-
1	00	x0	1xx	01			UNALLOCATED	-
1	!= 00	x0	10x	01			UNALLOCATED	-
1		x0	010	00	xx0		SME2 multiple vectors long MLA four sources	-
1		x0	0x0	01			UNALLOCATED	-
1		x0	100	00	x0x		UNALLOCATED	-
1		x0	101	00	x1x		SME2 multiple vectors two-way dot product four registers	-
	00	00	111	00	0xx		SME2 multiple vectors binary FP four registers	-
	00	00	111	00	1xx		SME2 multiple vectors binary int four registers	-
	00	10	111	00	0xx		SME2 multiple vectors binary FP16 four registers	-
	00	10	111	00	1xx		UNALLOCATED	-
	00	x0	1xx	1x			UNALLOCATED	-
	!= 00	x0	10x	1x			UNALLOCATED	-
	!= 00	x0	110	01			UNALLOCATED	-
	!= 00	x0	110	1x			UNALLOCATED	-
	!= 00	x0	111				UNALLOCATED	-
		x0	000	00		0	SME2 multiple vectors long long MLA four sources	-
		x0	000	00		1	UNALLOCATED	-
		x0	010	00	xx1		UNALLOCATED	-
		x0	0x0	1x			UNALLOCATED	-
		x0	0x1				UNALLOCATED	-
		x0	100	00	x1x		SME2 multiple vectors ternary FP16 four registers	-
		x0	101	00	x0x		SME2 multiple vectors four-way dot product four registers	-
		x0	110	00	0xx		SME2 multiple vectors ternary FP four registers	-
		x0	110	00	1xx		SME2 multiple vectors ternary int four registers	-
		x1					UNALLOCATED	-

SME2 multiple vectors long FMA four sources

These instructions are under SME2 Multi-vector - Multiple Array Vectors (Four registers).

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	0	1	1	0	1	Zm			0	1	0	Rv		0	1	0	Zn			0	0	op	S	0	off2

Decode fields		Instruction Details	Feature
op	S	Instruction Details	Feature
0	0	FMLAL (multiple vectors, FP16 to FP32)	FEAT_SME2
0	1	FMLSL (multiple vectors)	FEAT_SME2
1	0	BFMLAL (multiple vectors)	FEAT_SME2
1	1	BFMLSL (multiple vectors)	FEAT_SME2

SME2 multiple vectors FP dot product four registers

These instructions are under SME2 Multi-vector - Multiple Array Vectors (Four registers).

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	0	1	1	0	1	Zm			0	1	0	Rv		1	0	0	Zn			0	opc		0	off3

Decode fields	Instruction Details	Feature
opc	Instruction Details	Feature
00	FDOT (2-way, multiple vectors, FP16 to FP32)	FEAT_SME2
01	BFDOT (multiple vectors)	FEAT_SME2
10	FDOT (2-way, multiple vectors, FP8 to FP16)	FEAT_SME_F8F16
11	FDOT (4-way, multiple vectors)	FEAT_SME_F8F32

SME2 multiple vectors long MLA four sources

These instructions are under SME2 Multi-vector - Multiple Array Vectors (Four registers).

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	0	1	1	1	1	Zm			0	1	0	Rv		0	1	0	Zn			0	0	U	S	0	off2

Decode fields		Instruction Details	Feature
U	S	Instruction Details	Feature
0	0	SMLAL (multiple vectors)	FEAT_SME2
0	1	SMLSL (multiple vectors)	FEAT_SME2
1	0	UMLAL (multiple vectors)	FEAT_SME2
1	1	UMLSL (multiple vectors)	FEAT_SME2

SME2 multiple vectors two-way dot product four registers

These instructions are under SME2 Multi-vector - Multiple Array Vectors (Four registers).

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	0	1	1	1	1	Zm			0	1	0	Rv		1	0	1	Zn			0	0	U	1	off3

Decode fields	Instruction Details	Feature
U	Instruction Details	Feature
0	SDOT (2-way, multiple vectors)	FEAT_SME2
1	UDOT (2-way, multiple vectors)	FEAT_SME2

SME2 multiple vectors binary FP four registers

These instructions are under SME2 Multi-vector - Multiple Array Vectors (Four registers).

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	0	1	1	sz	1	0	0	0	0	1	0	Rv		1	1	1	Zm			0	0	0	S	off3

Decode fields	Instruction Details	Feature
S	Instruction Details	Feature
0	FADD	FEAT_SME2
1	FSUB	FEAT_SME2

SME2 multiple vectors binary int four registers

These instructions are under SME2 Multi-vector - Multiple Array Vectors (Four registers).

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	0	1	1	sz	1	0	0	0	0	1	0	Rv		1	1	1	Zm			0	0	1	S	off3

Decode fields	Instruction Details	Feature
S	Instruction Details	Feature
0	ADD (array accumulators)	FEAT_SME2
1	SUB (array accumulators)	FEAT_SME2

SME2 multiple vectors binary FP16 four registers

These instructions are under SME2 Multi-vector - Multiple Array Vectors (Four registers).

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	0	1	1	sz	1	0	0	1	0	1	0	Rv		1	1	1	Zm			0	0	0	S	off3

Decode fields		Instruction Details	Feature
sz	S	Instruction Details	Feature
0	0	FADD	FEAT_SME_F16F16
0	1	FSUB	FEAT_SME_F16F16
1	0	BFADD	FEAT_SVE_B16B16
1	1	BFSUB	FEAT_SVE_B16B16

SME2 multiple vectors long long MLA four sources

These instructions are under SME2 Multi-vector - Multiple Array Vectors (Four registers).

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	0	1	1	sz	1	Zm			0	1	0	Rv		0	0	0	Zn			0	0	U	S	op	0	o1

Decode fields				Instruction Details	Feature
sz	U	S	op	Instruction Details	Feature
	0	0	0	SMLALL (multiple vectors)	FEAT_SME2
	0	1	0	SMLSLL (multiple vectors)	FEAT_SME2
	1	0	0	UMLALL (multiple vectors)	FEAT_SME2
	1	1	0	UMLSLL (multiple vectors)	FEAT_SME2
0	0	0	1	USMLALL (multiple vectors)	FEAT_SME2
0	0	1	1	UNALLOCATED	-
0	1		1	UNALLOCATED	-
1			1	UNALLOCATED	-

SME2 multiple vectors ternary FP16 four registers

These instructions are under SME2 Multi-vector - Multiple Array Vectors (Four registers).

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	0	1	1	sz	1	Zm			0	1	0	Rv		1	0	0	Zn			0	0	S	1	off3

Decode fields		Instruction Details	Feature
sz	S	Instruction Details	Feature
0	0	FMLA (multiple vectors)	FEAT_SME_F16F16
0	1	FMLS (multiple vectors)	FEAT_SME_F16F16
1	0	BFMLA (multiple vectors)	FEAT_SVE_B16B16
1	1	BFMLS (multiple vectors)	FEAT_SVE_B16B16

SME2 multiple vectors four-way dot product four registers

These instructions are under SME2 Multi-vector - Multiple Array Vectors (Four registers).

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	0	1	1	sz	1	Zm			0	1	0	Rv		1	0	1	Zn			0	0	U	0	off3

Decode fields	Instruction Details	Feature
U	Instruction Details	Feature
0	SDOT (4-way, multiple vectors)	FEAT_SME2
1	UDOT (4-way, multiple vectors)	FEAT_SME2

SME2 multiple vectors ternary FP four registers

These instructions are under SME2 Multi-vector - Multiple Array Vectors (Four registers).

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	0	1	1	sz	1	Zm			0	1	0	Rv		1	1	0	Zn			0	0	0	S	off3

Decode fields	Instruction Details	Feature
S	Instruction Details	Feature
0	FMLA (multiple vectors)	FEAT_SME2
1	FMLS (multiple vectors)	FEAT_SME2

SME2 multiple vectors ternary int four registers

These instructions are under SME2 Multi-vector - Multiple Array Vectors (Four registers).

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	0	1	1	sz	1	Zm			0	1	0	Rv		1	1	0	Zn			0	0	1	S	off3

Decode fields	Instruction Details	Feature
S	Instruction Details	Feature
0	ADD (array results, multiple vectors)	FEAT_SME2
1	SUB (array results, multiple vectors)	FEAT_SME2

SME Memory

These instructions are under SME encodings.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1110000							op0				op1					op2	op3										op4

Decode fields					Instruction details	Feature
op0	op1	op2	op3	op4	Instruction details	Feature
0xx0				0xx	SME load array vector (elements)	-
0xx1				0xx	SME store array vector (elements)	-
0xxx				1xx	UNALLOCATED	-
100x	00000	0	xx000	0xx	SME save and restore array	-
100x	00000	0	xx000	1xx	UNALLOCATED	-
100x	00000	0	xx!= 000		UNALLOCATED	-
100x	!= 00000	0			UNALLOCATED	-
100x		1	00000	000	SME2 lookup table load/store	-
100x		1	00000	!= 000	UNALLOCATED	-
100x		1	!= 00000		UNALLOCATED	-
101x					UNALLOCATED	-
110x					UNALLOCATED	-
1110				0xx	LD1Q	FEAT_SME
1111				0xx	ST1Q	FEAT_SME
111x				1xx	UNALLOCATED	-

SME load array vector (elements)

These instructions are under SME Memory.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	1	0	0	0	0	0	msz		0	Rm					V	Rs		Pg			Rn					0	opc

Decode fields	Instruction Details	Feature
msz	Instruction Details	Feature
00	LD1B (scalar plus scalar, tile slice)	FEAT_SME
01	LD1H (scalar plus scalar, tile slice)	FEAT_SME
10	LD1W (scalar plus scalar, tile slice)	FEAT_SME
11	LD1D (scalar plus scalar, tile slice)	FEAT_SME

SME store array vector (elements)

These instructions are under SME Memory.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	1	0	0	0	0	0	msz		1	Rm					V	Rs		Pg			Rn					0	opc

Decode fields	Instruction Details	Feature
msz	Instruction Details	Feature
00	ST1B (scalar plus scalar, tile slice)	FEAT_SME
01	ST1H (scalar plus scalar, tile slice)	FEAT_SME
10	ST1W (scalar plus scalar, tile slice)	FEAT_SME
11	ST1D (scalar plus scalar, tile slice)	FEAT_SME

SME save and restore array

These instructions are under SME Memory.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	1	0	0	0	0	1	0	0	op	0	0	0	0	0	0	Rv		0	0	0	Rn					0	imm4

Decode fields	Instruction Details	Feature
op	Instruction Details	Feature
0	LDR (array vector)	FEAT_SME
1	STR (array vector)	FEAT_SME

SME2 lookup table load/store

These instructions are under SME Memory.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	1	0	0	0	0	1	0	0	opc						1	0	0	0	0	0	Rn					0	0	0	opc2

Decode fields		Instruction Details	Feature
opc	opc2	Instruction Details	Feature
x0xxxx		UNALLOCATED	-
x10xxx		UNALLOCATED	-
x110xx		UNALLOCATED	-
x1110x		UNALLOCATED	-
x11110		UNALLOCATED	-
x11111	01	UNALLOCATED	-
x11111	1x	UNALLOCATED	-
011111	00	LDR (table)	FEAT_SME2
111111	00	STR (table)	FEAT_SME2

SVE encodings

These instructions are under the top-level.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
op0			0010				op1									op2											op3

Decode fields				Instruction details	Feature
op0	op1	op2	op3	Instruction details	Feature
000	0xx0xxxx	x1xxxx		SVE Integer Multiply-Add - Predicated	-
000	0xx0xxxx	000xxx		SVE Integer Binary Arithmetic - Predicated	-
000	0xx0xxxx	001xxx		SVE Integer Reduction	-
000	0xx0xxxx	100xxx		SVE Bitwise Shift - Predicated	-
000	0xx0xxxx	101xxx		SVE Integer Unary Arithmetic - Predicated	-
000	0xx1xxxx	000xxx		SVE integer add/subtract vectors (unpredicated)	-
000	0xx1xxxx	001xxx		SVE Bitwise Logical - Unpredicated	-
000	0xx1xxxx	0100xx		SVE Index Generation	-
000	0xx1xxxx	0101xx		SVE Stack Allocation	-
000	0xx1xxxx	011xxx		SVE2 Integer Multiply - Unpredicated	-
000	0xx1xxxx	100xxx		SVE Bitwise Shift - Unpredicated	-
000	0xx1xxxx	1010xx		SVE address generation	-
000	0xx1xxxx	1011xx		SVE Integer Misc - Unpredicated	-
000	0xx1xxxx	11xxxx		SVE Element Count	-
000	1xx00xxx			SVE Bitwise Immediate	-
000	1xx01xxx			SVE Integer Wide Immediate - Predicated	-
000	1xx1xxxx	001000		DUP (indexed)	-
000	1xx1xxxx	001001		SVE Permute Vector - One Source Quadwords	-
000	1xx1xxxx	00101x		SVE table lookup (three sources)	-
000	1xx1xxxx	001100		TBL — SVE	-
000	1xx1xxxx	001101		TBXQ	FEAT_SVE2p1
000	1xx1xxxx	001110		SVE Permute Vector - Unpredicated	-
000	1xx1xxxx	001111		UNALLOCATED	-
000	1xx1xxxx	010xxx		SVE Permute Predicate	-
000	1xx1xxxx	011xxx		SVE permute vector elements	-
000	1xx1xxxx	10xxxx		SVE Permute Vector - Predicated	-
000	1xx1xxxx	11xxxx		SEL (vectors)	-
000	10x1xxxx	000xxx		SVE Permute Vector - Extract	-
000	11x1xxxx	000xxx		SVE Permute Vector - Segments	-
001	0xx0xxxx			SVE Integer Compare - Vectors	-
001	0xx1xxxx			SVE integer compare with unsigned immediate	-
001	1xx0xxxx	x0xxxx		SVE integer compare with signed immediate	-
001	1xx00xxx	01xxxx		SVE predicate logical operations	-
001	1xx00xxx	11xxxx		SVE Propagate Break	-
001	1xx01xxx	01xxxx		SVE Partition Break	-
001	1xx01xxx	11xxxx		SVE Predicate Misc	-
001	1xx1xxxx	00xxxx		SVE Integer Compare - Scalars	-
001	1xx1xxxx	01xxxx	0	SVE broadcast predicate element	-
001	1xx1xxxx	01xxxx	1	SVE Scalar Integer Compare - Predicate-as-counter	-
001	1xx1xxxx	11xxxx		SVE Integer Wide Immediate - Unpredicated	-
001	1xx100xx	10xxxx		SVE Predicate Count	-
001	1xx101xx	1000xx		SVE Inc/Dec by Predicate Count	-
001	1xx101xx	1001xx		SVE Write FFR	-
001	1xx101xx	101xxx		UNALLOCATED	-
001	1xx11xxx	10xxxx		UNALLOCATED	-
010	0xx0xxxx	0xxxxx		SVE Integer Multiply-Add - Unpredicated	-
010	0xx0xxxx	10xxxx		SVE2 Integer - Predicated	-
010	0xx0xxxx	11000x		SVE integer clamp	-
010	0xx0xxxx	1101xx		SVE2 multiply-add (checked pointer)	-
010	0xx0xxxx	111xxx		SVE permute vector elements (quadwords)	-
010	0xx1xxxx			SVE Multiply - Indexed	-
010	0x10xxxx	11001x		UNALLOCATED	-
010	0000xxxx	11001x		SVE two-way dot product	-
010	0100xxxx	11001x		SVE two-way dot product (indexed)	-
010	1xx0xxxx	0xxxxx		SVE2 Widening Integer Arithmetic	-
010	1xx0xxxx	10xxxx		SVE Misc	-
010	1xx0xxxx	11xxxx		SVE2 Accumulate	-
010	1xx1xxxx	0xxxxx		SVE2 Narrowing	-
010	1xx1xxxx	100xxx		SVE2 character match	-
010	1xx1xxxx	101xxx		SVE2 Histogram Computation (Segment) and Lookup Table	-
010	1xx1xxxx	110xxx		HISTCNT	-
010	1xx1xxxx	111xxx		SVE2 Crypto Extensions	-
011	0xx0xxxx	0xxxxx		FCMLA (vectors)	-
011	0xx00x1x	1xxxxx		UNALLOCATED	-
011	0xx00000	100xxx		FCADD	-
011	0xx00000	101xxx		UNALLOCATED	-
011	0xx00000	11xxxx		UNALLOCATED	-
011	0xx00001	1xxxxx		UNALLOCATED	-
011	0xx0010x	100xxx		UNALLOCATED	-
011	0xx0010x	101xxx		SVE floating-point convert precision odd elements	-
011	0xx0010x	11xxxx		UNALLOCATED	-
011	0xx010xx	100xxx		SVE2 floating-point pairwise operations	-
011	0xx010xx	101xxx		SVE floating-point recursive reduction (quadwords)	-
011	0xx010xx	11xxxx		UNALLOCATED	-
011	0xx011xx	1xxxxx		UNALLOCATED	-
011	0xx1xxxx	0000xx		SVE floating-point multiply-add (indexed)	-
011	0xx1xxxx	0001xx		SVE floating-point complex multiply-add (indexed)	-
011	0xx1xxxx	0010x0		SVE floating-point multiply (indexed)	-
011	0xx1xxxx	001001		SVE FP clamp	-
011	0xx1xxxx	001011		UNALLOCATED	-
011	0xx1xxxx	01x0xx		SVE Floating Point Widening Multiply-Add - Indexed	-
011	0xx1xxxx	10x00x		SVE Floating Point Widening Multiply-Add	-
011	0xx1xxxx	1100xx		SVE2 FP8 multiply-add long long (indexed)	-
011	0xx1xxxx	111000		UNALLOCATED	-
011	0xx1xxxx	111001		SVE floating point matrix multiply accumulate	-
011	0xx1xxxx	11101x		UNALLOCATED	-
011	0x01xxxx	0x11xx		UNALLOCATED	-
011	0x01xxxx	0101xx		SVE2 FP8 multiply-add long (indexed)	-
011	0x01xxxx	10xx10		SVE2 FP8 Widening Multiply-Add	-
011	0x01xxxx	10xx11		UNALLOCATED	-
011	0x01xxxx	10x10x		UNALLOCATED	-
011	0x01xxxx	11x1xx		UNALLOCATED	-
011	0x11xxxx	0011xx		UNALLOCATED	-
011	0x11xxxx	01x1xx		UNALLOCATED	-
011	0x11xxxx	1xx1xx		UNALLOCATED	-
011	0x11xxxx	10x01x		UNALLOCATED	-
011	1xx0xxxx	x1xxxx		SVE floating-point compare vectors	-
011	1xx0xxxx	000xxx		SVE floating-point arithmetic (unpredicated)	-
011	1xx0xxxx	100xxx		SVE Floating Point Arithmetic - Predicated	-
011	1xx0xxxx	101xxx		SVE Floating Point Unary Operations - Predicated	-
011	1xx000xx	001xxx		SVE floating-point recursive reduction	-
011	1xx001xx	0010xx		UNALLOCATED	-
011	1xx001xx	0011xx		SVE Floating Point Unary Operations - Unpredicated	-
011	1xx010xx	001xxx		SVE Floating Point Compare - with Zero	-
011	1xx011xx	001xxx		SVE Floating Point Accumulating Reduction	-
011	1xx1xxxx			SVE Floating Point Multiply-Add	-
100				SVE Memory - 32-bit Gather and Unsized Contiguous	-
101				SVE Memory - Contiguous Load	-
110				SVE Memory - 64-bit Gather	-
111		0x0xxx		SVE Memory - Contiguous Store and Unsized Contiguous	-
111		001xxx		SVE Memory - Non-temporal and Quadword Scatter Store	-
111		011xxx		SVE Memory - Non-temporal and Multi-register Contiguous Store	-
111		1x0xxx		SVE Memory - Scatter with Optional Sign Extend	-
111		101xxx		SVE Memory - Scatter	-
111		111xxx		SVE Memory - Contiguous Store with Immediate Offset	-

SVE Integer Multiply-Add - Predicated

These instructions are under SVE encodings.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
00000100										0						op0	1

Decode fields	Instruction details
op0	Instruction details
0	SVE integer multiply-accumulate writing addend (predicated)
1	SVE integer multiply-add writing multiplicand (predicated)

SVE integer multiply-accumulate writing addend (predicated)

These instructions are under SVE Integer Multiply-Add - Predicated.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
0	0	0	0	0	1	0	0	size		0	Zm					0	1	op	Pg			Zn					Zda

Decode fields	Instruction Details
op	Instruction Details
0	MLA (vectors)
1	MLS (vectors)

SVE integer multiply-add writing multiplicand (predicated)

These instructions are under SVE Integer Multiply-Add - Predicated.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
0	0	0	0	0	1	0	0	size		0	Zm					1	1	op	Pg			Za					Zdn

Decode fields	Instruction Details
op	Instruction Details
0	MAD
1	MSB

SVE Integer Binary Arithmetic - Predicated

These instructions are under SVE encodings.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
00000100										0	op0					000

Decode fields	Instruction details
op0	Instruction details
00x	SVE integer add/subtract vectors (predicated)
01x	SVE integer min/max/difference (predicated)
100	SVE integer multiply vectors (predicated)
101	SVE integer divide vectors (predicated)
11x	SVE bitwise logical operations (predicated)

SVE integer add/subtract vectors (predicated)

These instructions are under SVE Integer Binary Arithmetic - Predicated.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
0	0	0	0	0	1	0	0	size		0	0	0	opc			0	0	0	Pg			Zm					Zdn

Decode fields		Instruction Details	Feature
size	opc	Instruction Details	Feature
	000	ADD (vectors, predicated)	-
	001	SUB (vectors, predicated)	-
	010	UNALLOCATED	-
	011	SUBR (vectors)	-
0x	1xx	UNALLOCATED	-
10	1xx	UNALLOCATED	-
11	100	ADDPT (predicated)	FEAT_CPA
11	101	SUBPT (predicated)	FEAT_CPA
11	11x	UNALLOCATED	-

SVE integer min/max/difference (predicated)

These instructions are under SVE Integer Binary Arithmetic - Predicated.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
0	0	0	0	0	1	0	0	size		0	0	1	opc		U	0	0	0	Pg			Zm					Zdn

Decode fields		Instruction Details
opc	U	Instruction Details
00	0	SMAX (vectors)
00	1	UMAX (vectors)
01	0	SMIN (vectors)
01	1	UMIN (vectors)
10	0	SABD
10	1	UABD
11		UNALLOCATED

SVE integer multiply vectors (predicated)

These instructions are under SVE Integer Binary Arithmetic - Predicated.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
0	0	0	0	0	1	0	0	size		0	1	0	0	H	U	0	0	0	Pg			Zm					Zdn

Decode fields		Instruction Details
H	U	Instruction Details
0	0	MUL (vectors, predicated)
0	1	UNALLOCATED
1	0	SMULH (predicated)
1	1	UMULH (predicated)

SVE integer divide vectors (predicated)

These instructions are under SVE Integer Binary Arithmetic - Predicated.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
0	0	0	0	0	1	0	0	size		0	1	0	1	R	U	0	0	0	Pg			Zm					Zdn

Decode fields		Instruction Details
R	U	Instruction Details
0	0	SDIV
0	1	UDIV
1	0	SDIVR
1	1	UDIVR

SVE bitwise logical operations (predicated)

These instructions are under SVE Integer Binary Arithmetic - Predicated.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
0	0	0	0	0	1	0	0	size		0	1	1	opc			0	0	0	Pg			Zm					Zdn

Decode fields	Instruction Details
opc	Instruction Details
000	ORR (vectors, predicated)
001	EOR (vectors, predicated)
010	AND (vectors, predicated)
011	BIC (vectors, predicated)
1xx	UNALLOCATED

SVE Integer Reduction

These instructions are under SVE encodings.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
00000100										0	op0					001

Decode fields	Instruction details
op0	Instruction details
000	SVE integer add reduction (predicated)
001	SVE integer add reduction (quadwords)
010	SVE integer min/max reduction (predicated)
011	SVE integer min/max reduction (quadwords)
10x	SVE constructive prefix (predicated)
110	SVE bitwise logical reduction (predicated)
111	SVE bitwise logical reduction (quadwords)

SVE integer add reduction (predicated)

These instructions are under SVE Integer Reduction.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
0	0	0	0	0	1	0	0	size		0	0	0	0	op	U	0	0	1	Pg			Zn					Vd

Decode fields		Instruction Details
op	U	Instruction Details
0	0	SADDV
0	1	UADDV
1		UNALLOCATED

SVE integer add reduction (quadwords)

These instructions are under SVE Integer Reduction.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
0	0	0	0	0	1	0	0	size		0	0	0	1	op	U	0	0	1	Pg			Zn					Vd

Decode fields		Instruction Details	Feature
op	U	Instruction Details	Feature
0	0	UNALLOCATED	-
0	1	ADDQV	FEAT_SVE2p1
1		UNALLOCATED	-

SVE integer min/max reduction (predicated)

These instructions are under SVE Integer Reduction.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
0	0	0	0	0	1	0	0	size		0	0	1	0	op	U	0	0	1	Pg			Zn					Vd

Decode fields		Instruction Details
op	U	Instruction Details
0	0	SMAXV
0	1	UMAXV
1	0	SMINV
1	1	UMINV

SVE integer min/max reduction (quadwords)

These instructions are under SVE Integer Reduction.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
0	0	0	0	0	1	0	0	size		0	0	1	1	op	U	0	0	1	Pg			Zn					Vd

Decode fields		Instruction Details	Feature
op	U	Instruction Details	Feature
0	0	SMAXQV	FEAT_SVE2p1
0	1	UMAXQV	FEAT_SVE2p1
1	0	SMINQV	FEAT_SVE2p1
1	1	UMINQV	FEAT_SVE2p1

SVE constructive prefix (predicated)

These instructions are under SVE Integer Reduction.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
0	0	0	0	0	1	0	0	size		0	1	0	opc		M	0	0	1	Pg			Zn					Zd

Decode fields	Instruction Details
opc	Instruction Details
00	MOVPRFX (predicated)
01	UNALLOCATED
1x	UNALLOCATED

SVE bitwise logical reduction (predicated)

These instructions are under SVE Integer Reduction.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
0	0	0	0	0	1	0	0	size		0	1	1	0	opc		0	0	1	Pg			Zn					Vd

Decode fields	Instruction Details
opc	Instruction Details
00	ORV
01	EORV
10	ANDV
11	UNALLOCATED

SVE bitwise logical reduction (quadwords)

These instructions are under SVE Integer Reduction.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
0	0	0	0	0	1	0	0	size		0	1	1	1	opc		0	0	1	Pg			Zn					Vd

Decode fields	Instruction Details	Feature
opc	Instruction Details	Feature
00	ORQV	FEAT_SVE2p1
01	EORQV	FEAT_SVE2p1
10	ANDQV	FEAT_SVE2p1
11	UNALLOCATED	-

SVE Bitwise Shift - Predicated

These instructions are under SVE encodings.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
00000100										0	op0					100

Decode fields	Instruction details
op0	Instruction details
0x	SVE bitwise shift by immediate (predicated)
10	SVE bitwise shift by vector (predicated)
11	SVE bitwise shift by wide elements (predicated)

SVE bitwise shift by immediate (predicated)

These instructions are under SVE Bitwise Shift - Predicated.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
0	0	0	0	0	1	0	0	tszh		0	0	opc		L	U	1	0	0	Pg			tszl		imm3			Zdn

Decode fields			Instruction Details
opc	L	U	Instruction Details
00	0	0	ASR (immediate, predicated)
00	0	1	LSR (immediate, predicated)
00	1	0	UNALLOCATED
00	1	1	LSL (immediate, predicated)
01	0	0	ASRD
01	0	1	UNALLOCATED
01	1	0	SQSHL (immediate)
01	1	1	UQSHL (immediate)
10			UNALLOCATED
11	0	0	SRSHR
11	0	1	URSHR
11	1	0	UNALLOCATED
11	1	1	SQSHLU

SVE bitwise shift by vector (predicated)

These instructions are under SVE Bitwise Shift - Predicated.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
0	0	0	0	0	1	0	0	size		0	1	0	R	L	U	1	0	0	Pg			Zm					Zdn

Decode fields			Instruction Details
R	L	U	Instruction Details
	1	0	UNALLOCATED
0	0	0	ASR (vectors)
0	0	1	LSR (vectors)
0	1	1	LSL (vectors)
1	0	0	ASRR
1	0	1	LSRR
1	1	1	LSLR

SVE bitwise shift by wide elements (predicated)

These instructions are under SVE Bitwise Shift - Predicated.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
0	0	0	0	0	1	0	0	size		0	1	1	R	L	U	1	0	0	Pg			Zm					Zdn

Decode fields			Instruction Details
R	L	U	Instruction Details
0	0	0	ASR (wide elements, predicated)
0	0	1	LSR (wide elements, predicated)
0	1	0	UNALLOCATED
0	1	1	LSL (wide elements, predicated)
1			UNALLOCATED

SVE Integer Unary Arithmetic - Predicated

These instructions are under SVE encodings.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
00000100										0	op0					101

Decode fields	Instruction details
op0	Instruction details
0x	UNALLOCATED
10	SVE integer unary operations (predicated)
11	SVE bitwise unary operations (predicated)

SVE integer unary operations (predicated)

These instructions are under SVE Integer Unary Arithmetic - Predicated.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
0	0	0	0	0	1	0	0	size		0	1	0	opc			1	0	1	Pg			Zn					Zd

Decode fields	Instruction Details
opc	Instruction Details
000	SXTB, SXTH, SXTW — SXTB
001	UXTB, UXTH, UXTW — UXTB
010	SXTB, SXTH, SXTW — SXTH
011	UXTB, UXTH, UXTW — UXTH
100	SXTB, SXTH, SXTW — SXTW
101	UXTB, UXTH, UXTW — UXTW
110	ABS
111	NEG

SVE bitwise unary operations (predicated)

These instructions are under SVE Integer Unary Arithmetic - Predicated.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
0	0	0	0	0	1	0	0	size		0	1	1	opc			1	0	1	Pg			Zn					Zd

Decode fields	Instruction Details
opc	Instruction Details
000	CLS
001	CLZ
010	CNT
011	CNOT
100	FABS
101	FNEG
110	NOT (vector)
111	UNALLOCATED

SVE integer add/subtract vectors (unpredicated)

These instructions are under SVE encodings.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
0	0	0	0	0	1	0	0	size		1	Zm					0	0	0	opc			Zn					Zd

Decode fields		Instruction Details	Feature
size	opc	Instruction Details	Feature
	000	ADD (vectors, unpredicated)	-
	001	SUB (vectors, unpredicated)	-
	100	SQADD (vectors, unpredicated)	-
	101	UQADD (vectors, unpredicated)	-
	110	SQSUB (vectors, unpredicated)	-
	111	UQSUB (vectors, unpredicated)	-
0x	01x	UNALLOCATED	-
10	01x	UNALLOCATED	-
11	010	ADDPT (unpredicated)	FEAT_CPA
11	011	SUBPT (unpredicated)	FEAT_CPA

SVE Bitwise Logical - Unpredicated

These instructions are under SVE encodings.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
00000100										1						001			op0

Decode fields	Instruction details
op0	Instruction details
0xx	UNALLOCATED
100	SVE bitwise logical operations (unpredicated)
101	XAR
11x	SVE2 bitwise ternary operations

SVE bitwise logical operations (unpredicated)

These instructions are under SVE Bitwise Logical - Unpredicated.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
0	0	0	0	0	1	0	0	opc		1	Zm					0	0	1	1	0	0	Zn					Zd

Decode fields	Instruction Details
opc	Instruction Details
00	AND (vectors, unpredicated)
01	ORR (vectors, unpredicated)
10	EOR (vectors, unpredicated)
11	BIC (vectors, unpredicated)

SVE2 bitwise ternary operations

These instructions are under SVE Bitwise Logical - Unpredicated.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
0	0	0	0	0	1	0	0	opc		1	Zm					0	0	1	1	1	o2	Zk					Zdn

Decode fields		Instruction Details
opc	o2	Instruction Details
00	0	EOR3
00	1	BSL
01	0	BCAX
01	1	BSL1N
1x	0	UNALLOCATED
10	1	BSL2N
11	1	NBSL

SVE Index Generation

These instructions are under SVE encodings.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
00000100										1						0100				op0

Decode fields	Instruction details
op0	Instruction details
00	INDEX (immediates)
01	INDEX (scalar, immediate)
10	INDEX (immediate, scalar)
11	INDEX (scalars)

SVE Stack Allocation

These instructions are under SVE encodings.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
00000100								op0		1						0101				op1

Decode fields		Instruction details
op0	op1	Instruction details
0	0	SVE stack frame adjustment
0	1	Streaming SVE stack frame adjustment
1	0	SVE stack frame size
1	1	Streaming SVE stack frame size

SVE stack frame adjustment

These instructions are under SVE Stack Allocation.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
0	0	0	0	0	1	0	0	0	op	1	Rn					0	1	0	1	0	imm6						Rd

Decode fields	Instruction Details
op	Instruction Details
0	ADDVL
1	ADDPL

Streaming SVE stack frame adjustment

These instructions are under SVE Stack Allocation.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
0	0	0	0	0	1	0	0	0	op	1	Rn					0	1	0	1	1	imm6						Rd

Decode fields	Instruction Details	Feature
op	Instruction Details	Feature
0	ADDSVL	FEAT_SME
1	ADDSPL	FEAT_SME

SVE stack frame size

These instructions are under SVE Stack Allocation.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
0	0	0	0	0	1	0	0	1	op	1	opc2					0	1	0	1	0	imm6						Rd

Decode fields		Instruction Details
op	opc2	Instruction Details
0	0xxxx	UNALLOCATED
0	10xxx	UNALLOCATED
0	110xx	UNALLOCATED
0	1110x	UNALLOCATED
0	11110	UNALLOCATED
0	11111	RDVL
1		UNALLOCATED

Streaming SVE stack frame size

These instructions are under SVE Stack Allocation.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
0	0	0	0	0	1	0	0	1	op	1	opc2					0	1	0	1	1	imm6						Rd

Decode fields		Instruction Details	Feature
op	opc2	Instruction Details	Feature
0	0xxxx	UNALLOCATED	-
0	10xxx	UNALLOCATED	-
0	110xx	UNALLOCATED	-
0	1110x	UNALLOCATED	-
0	11110	UNALLOCATED	-
0	11111	RDSVL	FEAT_SME
1		UNALLOCATED	-

SVE2 Integer Multiply - Unpredicated

These instructions are under SVE encodings.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
00000100										1						011			op0

Decode fields	Instruction details
op0	Instruction details
0x	SVE2 integer multiply vectors (unpredicated)
10	SVE2 signed saturating doubling multiply high (unpredicated)
11	UNALLOCATED

SVE2 integer multiply vectors (unpredicated)

These instructions are under SVE2 Integer Multiply - Unpredicated.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
0	0	0	0	0	1	0	0	size		1	Zm					0	1	1	0	opc		Zn					Zd

Decode fields		Instruction Details
size	opc	Instruction Details
	00	MUL (vectors, unpredicated)
	10	SMULH (unpredicated)
	11	UMULH (unpredicated)
00	01	PMUL
01	01	UNALLOCATED
1x	01	UNALLOCATED

SVE2 signed saturating doubling multiply high (unpredicated)

These instructions are under SVE2 Integer Multiply - Unpredicated.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
0	0	0	0	0	1	0	0	size		1	Zm					0	1	1	1	0	R	Zn					Zd

Decode fields	Instruction Details
R	Instruction Details
0	SQDMULH (vectors)
1	SQRDMULH (vectors)

SVE Bitwise Shift - Unpredicated

These instructions are under SVE encodings.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
00000100										1						100			op0

Decode fields	Instruction details
op0	Instruction details
0	SVE bitwise shift by wide elements (unpredicated)
1	SVE bitwise shift by immediate (unpredicated)

SVE bitwise shift by wide elements (unpredicated)

These instructions are under SVE Bitwise Shift - Unpredicated.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
0	0	0	0	0	1	0	0	size		1	Zm					1	0	0	0	opc		Zn					Zd

Decode fields	Instruction Details
opc	Instruction Details
00	ASR (wide elements, unpredicated)
01	LSR (wide elements, unpredicated)
10	UNALLOCATED
11	LSL (wide elements, unpredicated)

SVE bitwise shift by immediate (unpredicated)

These instructions are under SVE Bitwise Shift - Unpredicated.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
0	0	0	0	0	1	0	0	tszh		1	tszl		imm3			1	0	0	1	opc		Zn					Zd

Decode fields	Instruction Details
opc	Instruction Details
00	ASR (immediate, unpredicated)
01	LSR (immediate, unpredicated)
10	UNALLOCATED
11	LSL (immediate, unpredicated)

SVE address generation

These instructions are under SVE encodings.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
0	0	0	0	0	1	0	0	opc		1	Zm					1	0	1	0	msz		Zn					Zd

Decode fields	Instruction Details
opc	Instruction Details
00	ADR — Unpacked 32-bit signed offsets
01	ADR — Unpacked 32-bit unsigned offsets
1x	ADR — Packed offsets

SVE Integer Misc - Unpredicated

These instructions are under SVE encodings.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
00000100										1						1011				op0

Decode fields	Instruction details
op0	Instruction details
0x	SVE floating-point trig select coefficient
10	SVE floating-point exponential accelerator
11	SVE constructive prefix (unpredicated)

SVE floating-point trig select coefficient

These instructions are under SVE Integer Misc - Unpredicated.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
0	0	0	0	0	1	0	0	size		1	Zm					1	0	1	1	0	op	Zn					Zd

Decode fields	Instruction Details
op	Instruction Details
0	FTSSEL
1	UNALLOCATED

SVE floating-point exponential accelerator

These instructions are under SVE Integer Misc - Unpredicated.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
0	0	0	0	0	1	0	0	size		1	opc					1	0	1	1	1	0	Zn					Zd

Decode fields	Instruction Details
opc	Instruction Details
00000	FEXPA
00001	UNALLOCATED
0001x	UNALLOCATED
001xx	UNALLOCATED
01xxx	UNALLOCATED
1xxxx	UNALLOCATED

SVE constructive prefix (unpredicated)

These instructions are under SVE Integer Misc - Unpredicated.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
0	0	0	0	0	1	0	0	opc		1	opc2					1	0	1	1	1	1	Zn					Zd

Decode fields		Instruction Details
opc	opc2	Instruction Details
00	00000	MOVPRFX (unpredicated)
00	00001	UNALLOCATED
00	0001x	UNALLOCATED
00	001xx	UNALLOCATED
00	01xxx	UNALLOCATED
00	1xxxx	UNALLOCATED
01		UNALLOCATED
1x		UNALLOCATED

SVE Element Count

These instructions are under SVE encodings.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
00000100										1	op0					11		op1

Decode fields		Instruction details
op0	op1	Instruction details
0	00x	SVE saturating inc/dec vector by element count
0	100	SVE element count
0	101	UNALLOCATED
1	000	SVE inc/dec vector by element count
1	100	SVE inc/dec register by element count
1	x01	UNALLOCATED
	01x	UNALLOCATED
	11x	SVE saturating inc/dec register by element count

SVE saturating inc/dec vector by element count

These instructions are under SVE Element Count.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
0	0	0	0	0	1	0	0	size		1	0	imm4				1	1	0	0	D	U	pattern					Zdn

Decode fields			Instruction Details
size	D	U	Instruction Details
00			UNALLOCATED
01	0	0	SQINCH (vector)
01	0	1	UQINCH (vector)
01	1	0	SQDECH (vector)
01	1	1	UQDECH (vector)
10	0	0	SQINCW (vector)
10	0	1	UQINCW (vector)
10	1	0	SQDECW (vector)
10	1	1	UQDECW (vector)
11	0	0	SQINCD (vector)
11	0	1	UQINCD (vector)
11	1	0	SQDECD (vector)
11	1	1	UQDECD (vector)

SVE element count

These instructions are under SVE Element Count.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
0	0	0	0	0	1	0	0	size		1	0	imm4				1	1	1	0	0	op	pattern					Rd

Decode fields		Instruction Details
size	op	Instruction Details
	1	UNALLOCATED
00	0	CNTB, CNTD, CNTH, CNTW — CNTB
01	0	CNTB, CNTD, CNTH, CNTW — CNTH
10	0	CNTB, CNTD, CNTH, CNTW — CNTW
11	0	CNTB, CNTD, CNTH, CNTW — CNTD

SVE inc/dec vector by element count

These instructions are under SVE Element Count.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
0	0	0	0	0	1	0	0	size		1	1	imm4				1	1	0	0	0	D	pattern					Zdn

Decode fields		Instruction Details
size	D	Instruction Details
00		UNALLOCATED
01	0	INCD, INCH, INCW (vector) — INCH
01	1	DECD, DECH, DECW (vector) — DECH
10	0	INCD, INCH, INCW (vector) — INCW
10	1	DECD, DECH, DECW (vector) — DECW
11	0	INCD, INCH, INCW (vector) — INCD
11	1	DECD, DECH, DECW (vector) — DECD

SVE inc/dec register by element count

These instructions are under SVE Element Count.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
0	0	0	0	0	1	0	0	size		1	1	imm4				1	1	1	0	0	D	pattern					Rdn

Decode fields		Instruction Details
size	D	Instruction Details
00	0	INCB, INCD, INCH, INCW (scalar) — INCB
00	1	DECB, DECD, DECH, DECW (scalar) — DECB
01	0	INCB, INCD, INCH, INCW (scalar) — INCH
01	1	DECB, DECD, DECH, DECW (scalar) — DECH
10	0	INCB, INCD, INCH, INCW (scalar) — INCW
10	1	DECB, DECD, DECH, DECW (scalar) — DECW
11	0	INCB, INCD, INCH, INCW (scalar) — INCD
11	1	DECB, DECD, DECH, DECW (scalar) — DECD

SVE saturating inc/dec register by element count

These instructions are under SVE Element Count.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
0	0	0	0	0	1	0	0	size		1	sf	imm4				1	1	1	1	D	U	pattern					Rdn

Decode fields				Instruction Details
size	sf	D	U	Instruction Details
00	0	0	0	SQINCB — 32-bit
00	0	0	1	UQINCB — 32-bit
00	0	1	0	SQDECB — 32-bit
00	0	1	1	UQDECB — 32-bit
00	1	0	0	SQINCB — 64-bit
00	1	0	1	UQINCB — 64-bit
00	1	1	0	SQDECB — 64-bit
00	1	1	1	UQDECB — 64-bit
01	0	0	0	SQINCH (scalar) — 32-bit
01	0	0	1	UQINCH (scalar) — 32-bit
01	0	1	0	SQDECH (scalar) — 32-bit
01	0	1	1	UQDECH (scalar) — 32-bit
01	1	0	0	SQINCH (scalar) — 64-bit
01	1	0	1	UQINCH (scalar) — 64-bit
01	1	1	0	SQDECH (scalar) — 64-bit
01	1	1	1	UQDECH (scalar) — 64-bit
10	0	0	0	SQINCW (scalar) — 32-bit
10	0	0	1	UQINCW (scalar) — 32-bit
10	0	1	0	SQDECW (scalar) — 32-bit
10	0	1	1	UQDECW (scalar) — 32-bit
10	1	0	0	SQINCW (scalar) — 64-bit
10	1	0	1	UQINCW (scalar) — 64-bit
10	1	1	0	SQDECW (scalar) — 64-bit
10	1	1	1	UQDECW (scalar) — 64-bit
11	0	0	0	SQINCD (scalar) — 32-bit
11	0	0	1	UQINCD (scalar) — 32-bit
11	0	1	0	SQDECD (scalar) — 32-bit
11	0	1	1	UQDECD (scalar) — 32-bit
11	1	0	0	SQINCD (scalar) — 64-bit
11	1	0	1	UQINCD (scalar) — 64-bit
11	1	1	0	SQDECD (scalar) — 64-bit
11	1	1	1	UQDECD (scalar) — 64-bit

SVE Bitwise Immediate

These instructions are under SVE encodings.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
00000101								op0		00		op1

Decode fields		Instruction details
op0	op1	Instruction details
11	00	DUPM
!= 11	00	SVE bitwise logical with immediate (unpredicated)
	!= 00	UNALLOCATED

SVE bitwise logical with immediate (unpredicated)

These instructions are under SVE Bitwise Immediate.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
0	0	0	0	0	1	0	1	!= 11		0	0	0	0	imm13													Zdn
								opc

The following constraints also apply to this encoding: opc != 11 && opc != 11

Decode fields	Instruction Details
opc	Instruction Details
00	ORR (immediate)
01	EOR (immediate)
10	AND (immediate)

SVE Integer Wide Immediate - Predicated

These instructions are under SVE encodings.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
00000101										01						op0

Decode fields	Instruction details
op0	Instruction details
0xx	SVE copy integer immediate (predicated)
10x	UNALLOCATED
110	FCPY
111	UNALLOCATED

SVE copy integer immediate (predicated)

These instructions are under SVE Integer Wide Immediate - Predicated.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
0	0	0	0	0	1	0	1	size		0	1	Pg				0	M	sh	imm8								Zd

Decode fields	Instruction Details
M	Instruction Details
0	CPY (immediate, zeroing)
1	CPY (immediate, merging)

SVE Permute Vector - One Source Quadwords

These instructions are under SVE encodings.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
00000101								op0		1	op1					001001

Decode fields		Instruction details	Feature
op0	op1	Instruction details	Feature
00		DUPQ	FEAT_SVE2p1
01	0	EXTQ	FEAT_SVE2p1
01	1	UNALLOCATED	-
1x		UNALLOCATED	-

SVE table lookup (three sources)

These instructions are under SVE encodings.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
0	0	0	0	0	1	0	1	size		1	Zm					0	0	1	0	1	op	Zn					Zd

Decode fields	Instruction Details
op	Instruction Details
0	TBL
1	TBX

SVE Permute Vector - Unpredicated

These instructions are under SVE encodings.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
00000101										1	op0		op1			001110						op2					op3

Decode fields				Instruction details
op0	op1	op2	op3	Instruction details
00	000			DUP (scalar)
00	100			INSR (scalar)
00	x10			UNALLOCATED
00	xx1			UNALLOCATED
01	xx0		0	SVE move predicate from vector
01	xx0		1	UNALLOCATED
01	xx1	0		SVE move predicate into vector
01	xx1	1		UNALLOCATED
10	0xx			SVE unpack vector elements
10	100			INSR (SIMD&FP scalar)
10	110			UNALLOCATED
10	1x1			UNALLOCATED
11	000			REV (vector)
11	!= 000			UNALLOCATED

SVE move predicate from vector

These instructions are under SVE Permute Vector - Unpredicated.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
0	0	0	0	0	1	0	1	opc		1	0	1	opc2		0	0	0	1	1	1	0	Zn					0	Pd

Decode fields		Instruction Details	Feature
opc	opc2	Instruction Details	Feature
00	00	UNALLOCATED	-
00	01	PMOV (to predicate) — byte	FEAT_SVE2p1
00	1x	PMOV (to predicate) — halfword	FEAT_SVE2p1
01		PMOV (to predicate) — word	FEAT_SVE2p1
1x		PMOV (to predicate) — doubleword	FEAT_SVE2p1

SVE move predicate into vector

These instructions are under SVE Permute Vector - Unpredicated.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
0	0	0	0	0	1	0	1	opc		1	0	1	opc2		1	0	0	1	1	1	0	0	Pn				Zd

Decode fields		Instruction Details	Feature
opc	opc2	Instruction Details	Feature
00	00	UNALLOCATED	-
00	01	PMOV (to vector) — byte	FEAT_SVE2p1
00	1x	PMOV (to vector) — halfword	FEAT_SVE2p1
01		PMOV (to vector) — word	FEAT_SVE2p1
1x		PMOV (to vector) — doubleword	FEAT_SVE2p1

SVE unpack vector elements

These instructions are under SVE Permute Vector - Unpredicated.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
0	0	0	0	0	1	0	1	size		1	1	0	0	U	H	0	0	1	1	1	0	Zn					Zd

Decode fields		Instruction Details
U	H	Instruction Details
0	0	SUNPKHI, SUNPKLO — SUNPKLO
0	1	SUNPKHI, SUNPKLO — SUNPKHI
1	0	UUNPKHI, UUNPKLO — UUNPKLO
1	1	UUNPKHI, UUNPKLO — UUNPKHI

SVE Permute Predicate

These instructions are under SVE encodings.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
00000101								op0		1	op1					010			op2								op3

Decode fields				Instruction details
op0	op1	op2	op3	Instruction details
00	1000x	0000	0	SVE unpack predicate elements
01	1000x	0000	0	UNALLOCATED
10	1000x	0000	0	UNALLOCATED
11	1000x	0000	0	UNALLOCATED
	0xxxx	xxx0	0	SVE permute predicate elements
	0xxxx	xxx1	0	UNALLOCATED
	10100	0000	0	REV (predicate)
	10101	0000	0	UNALLOCATED
	10x0x	1000	0	UNALLOCATED
	10x0x	x100	0	UNALLOCATED
	10x0x	xx10	0	UNALLOCATED
	10x0x	xxx1	0	UNALLOCATED
	10x1x		0	UNALLOCATED
	11xxx		0	UNALLOCATED
			1	UNALLOCATED

SVE unpack predicate elements

These instructions are under SVE Permute Predicate.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
0	0	0	0	0	1	0	1	0	0	1	1	0	0	0	H	0	1	0	0	0	0	0	Pn				0	Pd

Decode fields	Instruction Details
H	Instruction Details
0	PUNPKHI, PUNPKLO — PUNPKLO
1	PUNPKHI, PUNPKLO — PUNPKHI

SVE permute predicate elements

These instructions are under SVE Permute Predicate.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
0	0	0	0	0	1	0	1	size		1	0	Pm				0	1	0	opc		H	0	Pn				0	Pd

Decode fields		Instruction Details
opc	H	Instruction Details
00	0	ZIP1, ZIP2 (predicates) — ZIP1
00	1	ZIP1, ZIP2 (predicates) — ZIP2
01	0	UZP1, UZP2 (predicates) — UZP1
01	1	UZP1, UZP2 (predicates) — UZP2
10	0	TRN1, TRN2 (predicates) — TRN1
10	1	TRN1, TRN2 (predicates) — TRN2
11		UNALLOCATED

SVE permute vector elements

These instructions are under SVE encodings.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
0	0	0	0	0	1	0	1	size		1	Zm					0	1	1	opc			Zn					Zd

Decode fields	Instruction Details
opc	Instruction Details
000	ZIP1, ZIP2 (vectors) — ZIP1
001	ZIP1, ZIP2 (vectors) — ZIP2
010	UZP1, UZP2 (vectors) — UZP1
011	UZP1, UZP2 (vectors) — UZP2
100	TRN1, TRN2 (vectors) — TRN1
101	TRN1, TRN2 (vectors) — TRN2
11x	UNALLOCATED

SVE Permute Vector - Predicated

These instructions are under SVE encodings.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
00000101										1	op0	op1			op2	10		op3

Decode fields				Instruction details
op0	op1	op2	op3	Instruction details
0	000	0	0	CPY (SIMD&FP scalar)
0	000	1	0	COMPACT
0	000		1	SVE extract element to general register
0	001		0	SVE extract element to SIMD&FP scalar register
0	01x		0	SVE reverse within elements
0	01x		1	UNALLOCATED
0	100	0	1	CPY (scalar)
0	100	1	1	UNALLOCATED
0	100		0	SVE conditionally broadcast element to vector
0	101		0	SVE conditionally extract element to SIMD&FP scalar
0	110	0	0	SPLICE — Destructive
0	110	1	0	SPLICE — Constructive
0	110		1	UNALLOCATED
0	111	0	0	SVE reverse doublewords
0	111	0	1	UNALLOCATED
0	111	1		UNALLOCATED
0	x01		1	UNALLOCATED
1	000		0	UNALLOCATED
1	000		1	SVE conditionally extract element to general register
1	!= 000			UNALLOCATED

SVE extract element to general register

These instructions are under SVE Permute Vector - Predicated.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
0	0	0	0	0	1	0	1	size		1	0	0	0	0	B	1	0	1	Pg			Zn					Rd

Decode fields	Instruction Details
B	Instruction Details
0	LASTA (scalar)
1	LASTB (scalar)

SVE extract element to SIMD&FP scalar register

These instructions are under SVE Permute Vector - Predicated.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
0	0	0	0	0	1	0	1	size		1	0	0	0	1	B	1	0	0	Pg			Zn					Vd

Decode fields	Instruction Details
B	Instruction Details
0	LASTA (SIMD&FP scalar)
1	LASTB (SIMD&FP scalar)

SVE reverse within elements

These instructions are under SVE Permute Vector - Predicated.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
0	0	0	0	0	1	0	1	size		1	0	0	1	opc		1	0	0	Pg			Zn					Zd

Decode fields	Instruction Details
opc	Instruction Details
00	REVB, REVH, REVW — REVB
01	REVB, REVH, REVW — REVH
10	REVB, REVH, REVW — REVW
11	RBIT

SVE conditionally broadcast element to vector

These instructions are under SVE Permute Vector - Predicated.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
0	0	0	0	0	1	0	1	size		1	0	1	0	0	B	1	0	0	Pg			Zm					Zdn

Decode fields	Instruction Details
B	Instruction Details
0	CLASTA (vectors)
1	CLASTB (vectors)

SVE conditionally extract element to SIMD&FP scalar

These instructions are under SVE Permute Vector - Predicated.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
0	0	0	0	0	1	0	1	size		1	0	1	0	1	B	1	0	0	Pg			Zm					Vdn

Decode fields	Instruction Details
B	Instruction Details
0	CLASTA (SIMD&FP scalar)
1	CLASTB (SIMD&FP scalar)

SVE reverse doublewords

These instructions are under SVE Permute Vector - Predicated.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
0	0	0	0	0	1	0	1	size		1	0	1	1	1	0	1	0	0	Pg			Zn					Zd

Decode fields	Instruction Details	Feature
size	Instruction Details	Feature
00	REVD	FEAT_SVE2p1
01	UNALLOCATED	-
1x	UNALLOCATED	-

SVE conditionally extract element to general register

These instructions are under SVE Permute Vector - Predicated.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
0	0	0	0	0	1	0	1	size		1	1	0	0	0	B	1	0	1	Pg			Zm					Rdn

Decode fields	Instruction Details
B	Instruction Details
0	CLASTA (scalar)
1	CLASTB (scalar)

SVE Permute Vector - Extract

These instructions are under SVE encodings.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
000001010									op0	1						000

Decode fields	Instruction details
op0	Instruction details
0	EXT — Destructive
1	EXT — Constructive

SVE Permute Vector - Segments

These instructions are under SVE encodings.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
000001011									op0	1						000

Decode fields	Instruction details
op0	Instruction details
0	SVE permute vector segments
1	UNALLOCATED

SVE permute vector segments

These instructions are under SVE Permute Vector - Segments.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
0	0	0	0	0	1	0	1	1	0	1	Zm					0	0	0	opc		H	Zn					Zd

Decode fields		Instruction Details	Feature
opc	H	Instruction Details	Feature
00	0	ZIP1, ZIP2 (vectors) — ZIP1	FEAT_F64MM
00	1	ZIP1, ZIP2 (vectors) — ZIP2	FEAT_F64MM
01	0	UZP1, UZP2 (vectors) — UZP1	FEAT_F64MM
01	1	UZP1, UZP2 (vectors) — UZP2	FEAT_F64MM
10		UNALLOCATED	-
11	0	TRN1, TRN2 (vectors) — TRN1	FEAT_F64MM
11	1	TRN1, TRN2 (vectors) — TRN2	FEAT_F64MM

SVE Integer Compare - Vectors

These instructions are under SVE encodings.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
00100100										0							op0

Decode fields	Instruction details
op0	Instruction details
0	SVE integer compare vectors
1	SVE integer compare with wide elements

SVE integer compare vectors

These instructions are under SVE Integer Compare - Vectors.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
0	0	1	0	0	1	0	0	size		0	Zm					op	0	o2	Pg			Zn					ne	Pd

Decode fields			Instruction Details
op	o2	ne	Instruction Details
0	0	0	CMP<cc> (vectors) — CMPHS
0	0	1	CMP<cc> (vectors) — CMPHI
0	1	0	CMP<cc> (wide elements) — CMPEQ
0	1	1	CMP<cc> (wide elements) — CMPNE
1	0	0	CMP<cc> (vectors) — CMPGE
1	0	1	CMP<cc> (vectors) — CMPGT
1	1	0	CMP<cc> (vectors) — CMPEQ
1	1	1	CMP<cc> (vectors) — CMPNE

SVE integer compare with wide elements

These instructions are under SVE Integer Compare - Vectors.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
0	0	1	0	0	1	0	0	size		0	Zm					U	1	lt	Pg			Zn					ne	Pd

Decode fields			Instruction Details
U	lt	ne	Instruction Details
0	0	0	CMP<cc> (wide elements) — CMPGE
0	0	1	CMP<cc> (wide elements) — CMPGT
0	1	0	CMP<cc> (wide elements) — CMPLT
0	1	1	CMP<cc> (wide elements) — CMPLE
1	0	0	CMP<cc> (wide elements) — CMPHS
1	0	1	CMP<cc> (wide elements) — CMPHI
1	1	0	CMP<cc> (wide elements) — CMPLO
1	1	1	CMP<cc> (wide elements) — CMPLS

SVE integer compare with unsigned immediate

These instructions are under SVE encodings.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
0	0	1	0	0	1	0	0	size		1	imm7							lt	Pg			Zn					ne	Pd

Decode fields		Instruction Details
lt	ne	Instruction Details
0	0	CMP<cc> (immediate) — CMPHS
0	1	CMP<cc> (immediate) — CMPHI
1	0	CMP<cc> (immediate) — CMPLO
1	1	CMP<cc> (immediate) — CMPLS

SVE integer compare with signed immediate

These instructions are under SVE encodings.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
0	0	1	0	0	1	0	1	size		0	imm5					op	0	o2	Pg			Zn					ne	Pd

Decode fields			Instruction Details
op	o2	ne	Instruction Details
0	0	0	CMP<cc> (immediate) — CMPGE
0	0	1	CMP<cc> (immediate) — CMPGT
0	1	0	CMP<cc> (immediate) — CMPLT
0	1	1	CMP<cc> (immediate) — CMPLE
1	0	0	CMP<cc> (immediate) — CMPEQ
1	0	1	CMP<cc> (immediate) — CMPNE
1	1		UNALLOCATED

SVE predicate logical operations

These instructions are under SVE encodings.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
0	0	1	0	0	1	0	1	op	S	0	0	Pm				0	1	Pg				o2	Pn				o3	Pd

Decode fields				Instruction Details
op	S	o2	o3	Instruction Details
0	0	0	0	AND (predicates)
0	0	0	1	BIC (predicates)
0	0	1	0	EOR (predicates)
0	0	1	1	SEL (predicates)
0	1	0	0	ANDS
0	1	0	1	BICS
0	1	1	0	EORS
0	1	1	1	UNALLOCATED
1	0	0	0	ORR (predicates)
1	0	0	1	ORN (predicates)
1	0	1	0	NOR
1	0	1	1	NAND
1	1	0	0	ORRS
1	1	0	1	ORNS
1	1	1	0	NORS
1	1	1	1	NANDS

SVE Propagate Break

These instructions are under SVE encodings.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
00100101										00						11						op0

Decode fields	Instruction details
op0	Instruction details
0	SVE propagate break from previous partition
1	UNALLOCATED

SVE propagate break from previous partition

These instructions are under SVE Propagate Break.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
0	0	1	0	0	1	0	1	op	S	0	0	Pm				1	1	Pg				0	Pn				B	Pd

Decode fields			Instruction Details
op	S	B	Instruction Details
0	0	0	BRKPA
0	0	1	BRKPB
0	1	0	BRKPAS
0	1	1	BRKPBS
1			UNALLOCATED

SVE Partition Break

These instructions are under SVE encodings.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
00100101								op0		01		op1				01						op2					op3

Decode fields				Instruction details
op0	op1	op2	op3	Instruction details
0	1000	0	0	SVE propagate break to next partition
0	1000	0	1	UNALLOCATED
0	x000	1		UNALLOCATED
0	x1xx			UNALLOCATED
0	xx1x			UNALLOCATED
0	xxx1			UNALLOCATED
1	0000	1		UNALLOCATED
1	!= 0000			UNALLOCATED
	0000	0		SVE partition break condition

SVE propagate break to next partition

These instructions are under SVE Partition Break.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
0	0	1	0	0	1	0	1	0	S	0	1	1	0	0	0	0	1	Pg				0	Pn				0	Pdm

Decode fields	Instruction Details
S	Instruction Details
0	BRKN
1	BRKNS

SVE partition break condition

These instructions are under SVE Partition Break.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
0	0	1	0	0	1	0	1	B	S	0	1	0	0	0	0	0	1	Pg				0	Pn				M	Pd

Decode fields			Instruction Details
B	S	M	Instruction Details
	1	1	UNALLOCATED
0	0		BRKA
0	1	0	BRKAS
1	0		BRKB
1	1	0	BRKBS

SVE Predicate Misc

These instructions are under SVE encodings.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
00100101										01		op0				11		op1			op2		op3				op4

Decode fields					Instruction details
op0	op1	op2	op3	op4	Instruction details
0000		x0		0	SVE predicate test
0100		x0		0	UNALLOCATED
0x10		x0		0	UNALLOCATED
0xx1		x0		0	UNALLOCATED
0xxx		x1		0	UNALLOCATED
1000	000	00		0	SVE predicate first active
1000	000	!= 00		0	UNALLOCATED
1000	100	10	0000	0	SVE predicate zero
1000	100	10	!= 0000	0	UNALLOCATED
1000	110	00		0	SVE predicate read from FFR (predicated)
1001	000	0x		0	UNALLOCATED
1001	000	10		0	PNEXT
1001	000	11		0	UNALLOCATED
1001	100	10		0	UNALLOCATED
1001	110	00	0000	0	SVE predicate read from FFR (unpredicated)
1001	110	00	!= 0000	0	UNALLOCATED
100x	010			0	UNALLOCATED
100x	100	0x		0	SVE predicate initialize
100x	100	11		0	UNALLOCATED
100x	110	!= 00		0	UNALLOCATED
100x	xx1			0	UNALLOCATED
110x				0	UNALLOCATED
1x1x				0	UNALLOCATED
				1	UNALLOCATED

SVE predicate test

These instructions are under SVE Predicate Misc.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
0	0	1	0	0	1	0	1	op	S	0	1	0	0	0	0	1	1	Pg				0	Pn				0	opc2

Decode fields			Instruction Details
op	S	opc2	Instruction Details
0	0		UNALLOCATED
0	1	0000	PTEST
0	1	0001	UNALLOCATED
0	1	001x	UNALLOCATED
0	1	01xx	UNALLOCATED
0	1	1xxx	UNALLOCATED
1			UNALLOCATED

SVE predicate first active

These instructions are under SVE Predicate Misc.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
0	0	1	0	0	1	0	1	op	S	0	1	1	0	0	0	1	1	0	0	0	0	0	Pg				0	Pdn

Decode fields		Instruction Details
op	S	Instruction Details
0	0	UNALLOCATED
0	1	PFIRST
1		UNALLOCATED

SVE predicate zero

These instructions are under SVE Predicate Misc.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
0	0	1	0	0	1	0	1	op	S	0	1	1	0	0	0	1	1	1	0	0	1	0	0	0	0	0	0	Pd

Decode fields		Instruction Details
op	S	Instruction Details
0	0	PFALSE
0	1	UNALLOCATED
1		UNALLOCATED

SVE predicate read from FFR (predicated)

These instructions are under SVE Predicate Misc.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
0	0	1	0	0	1	0	1	op	S	0	1	1	0	0	0	1	1	1	1	0	0	0	Pg				0	Pd

Decode fields		Instruction Details
op	S	Instruction Details
0	0	RDFFR (predicated)
0	1	RDFFRS
1		UNALLOCATED

SVE predicate read from FFR (unpredicated)

These instructions are under SVE Predicate Misc.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
0	0	1	0	0	1	0	1	op	S	0	1	1	0	0	1	1	1	1	1	0	0	0	0	0	0	0	0	Pd

Decode fields		Instruction Details
op	S	Instruction Details
0	0	RDFFR (unpredicated)
0	1	UNALLOCATED
1		UNALLOCATED

SVE predicate initialize

These instructions are under SVE Predicate Misc.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
0	0	1	0	0	1	0	1	size		0	1	1	0	0	S	1	1	1	0	0	0	pattern					0	Pd

Decode fields	Instruction Details
S	Instruction Details
0	PTRUE (predicate)
1	PTRUES

SVE Integer Compare - Scalars

These instructions are under SVE encodings.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
00100101										1						00		op0		op1								op2

Decode fields			Instruction details
op0	op1	op2	Instruction details
0x			SVE integer compare scalar count and limit
10	00	0000	SVE conditionally terminate scalars
10	00	!= 0000	UNALLOCATED
11	00		SVE pointer conflict compare
1x	!= 00		UNALLOCATED

SVE integer compare scalar count and limit

These instructions are under SVE Integer Compare - Scalars.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
0	0	1	0	0	1	0	1	size		1	Rm					0	0	0	sf	U	lt	Rn					eq	Pd

Decode fields			Instruction Details
U	lt	eq	Instruction Details
0	0	0	WHILEGE (predicate)
0	0	1	WHILEGT (predicate)
0	1	0	WHILELT (predicate)
0	1	1	WHILELE (predicate)
1	0	0	WHILEHS (predicate)
1	0	1	WHILEHI (predicate)
1	1	0	WHILELO (predicate)
1	1	1	WHILELS (predicate)

SVE conditionally terminate scalars

These instructions are under SVE Integer Compare - Scalars.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
0	0	1	0	0	1	0	1	op	sz	1	Rm					0	0	1	0	0	0	Rn					ne	0	0	0	0

Decode fields		Instruction Details
op	ne	Instruction Details
0		UNALLOCATED
1	0	CTERMEQ, CTERMNE — CTERMEQ
1	1	CTERMEQ, CTERMNE — CTERMNE

SVE pointer conflict compare

These instructions are under SVE Integer Compare - Scalars.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
0	0	1	0	0	1	0	1	size		1	Rm					0	0	1	1	0	0	Rn					rw	Pd

Decode fields	Instruction Details
rw	Instruction Details
0	WHILEWR
1	WHILERW

SVE broadcast predicate element

These instructions are under SVE encodings.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
0	0	1	0	0	1	0	1	i1	tszh	1	tszl			Rv		0	1	Pn				S	Pm				0	Pd

Decode fields	Instruction Details	Feature
S	Instruction Details	Feature
0	PSEL	FEAT_SVE2p1
1	UNALLOCATED	-

SVE Scalar Integer Compare - Predicate-as-counter

These instructions are under SVE encodings.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
00100101										1	op0					01		op1			op2						1	op3

Decode fields				Instruction details	Feature
op0	op1	op2	op3	Instruction details	Feature
00000	110			SVE extract mask predicate from predicate-as-counter	-
00000	111	000000	0	PTRUE (predicate as counter)	FEAT_SVE2p1
00000	111	000000	1	UNALLOCATED	-
00000	111	!= 000000		UNALLOCATED	-
!= 00000	11x			UNALLOCATED	-
	01x			SVE integer compare scalar count and limit (predicate pair)	-
	x0x			SVE integer compare scalar count and limit (predicate-as-counter)	-

SVE extract mask predicate from predicate-as-counter

These instructions are under SVE Scalar Integer Compare - Predicate-as-counter.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
0	0	1	0	0	1	0	1	size		1	0	0	0	0	0	0	1	1	1	0	opc			PNn			1	Pd

Decode fields	Instruction Details	Feature
opc	Instruction Details	Feature
0xx	PEXT (predicate)	FEAT_SVE2p1
10x	PEXT (predicate pair)	FEAT_SVE2p1
11x	UNALLOCATED	-

SVE integer compare scalar count and limit (predicate pair)

These instructions are under SVE Scalar Integer Compare - Predicate-as-counter.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
0	0	1	0	0	1	0	1	size		1	Rm					0	1	0	1	U	lt	Rn					1	Pd			eq

Decode fields			Instruction Details	Feature
U	lt	eq	Instruction Details	Feature
0	0	0	WHILEGE (predicate pair)	FEAT_SVE2p1
0	0	1	WHILEGT (predicate pair)	FEAT_SVE2p1
0	1	0	WHILELT (predicate pair)	FEAT_SVE2p1
0	1	1	WHILELE (predicate pair)	FEAT_SVE2p1
1	0	0	WHILEHS (predicate pair)	FEAT_SVE2p1
1	0	1	WHILEHI (predicate pair)	FEAT_SVE2p1
1	1	0	WHILELO (predicate pair)	FEAT_SVE2p1
1	1	1	WHILELS (predicate pair)	FEAT_SVE2p1

SVE integer compare scalar count and limit (predicate-as-counter)

These instructions are under SVE Scalar Integer Compare - Predicate-as-counter.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
0	0	1	0	0	1	0	1	size		1	Rm					0	1	vl	0	U	lt	Rn					1	eq	PNd

Decode fields			Instruction Details	Feature
U	lt	eq	Instruction Details	Feature
0	0	0	WHILEGE (predicate as counter)	FEAT_SVE2p1
0	0	1	WHILEGT (predicate as counter)	FEAT_SVE2p1
0	1	0	WHILELT (predicate as counter)	FEAT_SVE2p1
0	1	1	WHILELE (predicate as counter)	FEAT_SVE2p1
1	0	0	WHILEHS (predicate as counter)	FEAT_SVE2p1
1	0	1	WHILEHI (predicate as counter)	FEAT_SVE2p1
1	1	0	WHILELO (predicate as counter)	FEAT_SVE2p1
1	1	1	WHILELS (predicate as counter)	FEAT_SVE2p1

SVE Integer Wide Immediate - Unpredicated

These instructions are under SVE encodings.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
00100101										1	op0				op1	11

Decode fields		Instruction details
op0	op1	Instruction details
00		SVE integer add/subtract immediate (unpredicated)
01		SVE integer min/max immediate (unpredicated)
10		SVE integer multiply immediate (unpredicated)
11	0	SVE broadcast integer immediate (unpredicated)
11	1	SVE broadcast floating-point immediate (unpredicated)

SVE integer add/subtract immediate (unpredicated)

These instructions are under SVE Integer Wide Immediate - Unpredicated.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
0	0	1	0	0	1	0	1	size		1	0	0	opc			1	1	sh	imm8								Zdn

Decode fields	Instruction Details
opc	Instruction Details
000	ADD (immediate)
001	SUB (immediate)
010	UNALLOCATED
011	SUBR (immediate)
100	SQADD (immediate)
101	UQADD (immediate)
110	SQSUB (immediate)
111	UQSUB (immediate)

SVE integer min/max immediate (unpredicated)

These instructions are under SVE Integer Wide Immediate - Unpredicated.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
0	0	1	0	0	1	0	1	size		1	0	1	opc			1	1	o2	imm8								Zdn

Decode fields		Instruction Details
opc	o2	Instruction Details
0xx	1	UNALLOCATED
000	0	SMAX (immediate)
001	0	UMAX (immediate)
010	0	SMIN (immediate)
011	0	UMIN (immediate)
1xx		UNALLOCATED

SVE integer multiply immediate (unpredicated)

These instructions are under SVE Integer Wide Immediate - Unpredicated.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
0	0	1	0	0	1	0	1	size		1	1	0	opc			1	1	o2	imm8								Zdn

Decode fields		Instruction Details
opc	o2	Instruction Details
000	0	MUL (immediate)
000	1	UNALLOCATED
001		UNALLOCATED
01x		UNALLOCATED
1xx		UNALLOCATED

SVE broadcast integer immediate (unpredicated)

These instructions are under SVE Integer Wide Immediate - Unpredicated.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
0	0	1	0	0	1	0	1	size		1	1	1	opc		0	1	1	sh	imm8								Zd

Decode fields	Instruction Details
opc	Instruction Details
00	DUP (immediate)
01	UNALLOCATED
1x	UNALLOCATED

SVE broadcast floating-point immediate (unpredicated)

These instructions are under SVE Integer Wide Immediate - Unpredicated.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
0	0	1	0	0	1	0	1	size		1	1	1	opc		1	1	1	o2	imm8								Zd

Decode fields		Instruction Details
opc	o2	Instruction Details
00	0	FDUP
00	1	UNALLOCATED
01		UNALLOCATED
1x		UNALLOCATED

SVE Predicate Count

These instructions are under SVE encodings.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
00100101										100						10		op0				op1

Decode fields		Instruction details
op0	op1	Instruction details
000	1	SVE predicate count (predicate-as-counter)
!= 000	1	UNALLOCATED
	0	SVE predicate count

SVE predicate count (predicate-as-counter)

These instructions are under SVE Predicate Count.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
0	0	1	0	0	1	0	1	size		1	0	0	opc			1	0	0	0	0	vl	1	PNn				Rd

Decode fields	Instruction Details	Feature
opc	Instruction Details	Feature
000	CNTP (predicate as counter)	FEAT_SVE2p1
001	UNALLOCATED	-

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
op0			op1

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	0	1	0	0	0	0	0	0	0	0	Rm					0	msz		PNg			Rn					Zt				N

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	0	1	0	0	0	0	0	0	0	0	Rm					1	msz		PNg			Rn					Zt			0	N

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	0	1	0	0	0	0	0	0	0	1	Rm					0	msz		PNg			Rn					Zt				N

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	0	1	0	0	0	0	0	0	0	1	Rm					1	msz		PNg			Rn					Zt			0	N

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	0	1	0	0	0	0	1	0	0	0	Rm					0	msz		PNg			Rn					Zth	N	Ztl

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	0	1	0	0	0	0	1	0	0	0	Rm					1	msz		PNg			Rn					Zth	N	0	Ztl

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	0	1	0	0	0	0	1	0	0	1	Rm					0	msz		PNg			Rn					Zth	N	Ztl

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	0	1	0	0	0	0	1	0	0	1	Rm					1	msz		PNg			Rn					Zth	N	0	Ztl

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	0	0	0	1	0	0	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	opc

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
op0			op1

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	0	1	0	0	0	0	0	0	0	0	Rm					0	msz		PNg			Rn					Zt				N

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	0	1	0	0	0	0	0	0	0	0	Rm					1	msz		PNg			Rn					Zt			0	N

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	0	1	0	0	0	0	0	0	0	1	Rm					0	msz		PNg			Rn					Zt				N

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	0	1	0	0	0	0	0	0	0	1	Rm					1	msz		PNg			Rn					Zt			0	N

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	0	1	0	0	0	0	1	0	0	0	Rm					0	msz		PNg			Rn					Zth	N	Ztl

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	0	1	0	0	0	0	1	0	0	0	Rm					1	msz		PNg			Rn					Zth	N	0	Ztl

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	0	1	0	0	0	0	1	0	0	1	Rm					0	msz		PNg			Rn					Zth	N	Ztl

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	0	1	0	0	0	0	1	0	0	1	Rm					1	msz		PNg			Rn					Zth	N	0	Ztl

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	0	0	0	1	0	0	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	opc

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
op0			op1

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	0	1	0	0	0	0	0	0	0	0	Rm					0	msz		PNg			Rn					Zt				N

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	0	1	0	0	0	0	0	0	0	0	Rm					1	msz		PNg			Rn					Zt			0	N

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	0	1	0	0	0	0	0	0	0	1	Rm					0	msz		PNg			Rn					Zt				N

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	0	1	0	0	0	0	0	0	0	1	Rm					1	msz		PNg			Rn					Zt			0	N

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	0	1	0	0	0	0	1	0	0	0	Rm					0	msz		PNg			Rn					Zth	N	Ztl

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	0	1	0	0	0	0	1	0	0	0	Rm					1	msz		PNg			Rn					Zth	N	0	Ztl

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	0	1	0	0	0	0	1	0	0	1	Rm					0	msz		PNg			Rn					Zth	N	Ztl

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	0	1	0	0	0	0	1	0	0	1	Rm					1	msz		PNg			Rn					Zth	N	0	Ztl

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	0	0	0	1	0	0	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	opc