Subtract with carry long (bottom)
Subtract the evennumbered elements of the first source vector and the inverted 1bit carry from the leastsignificant bit of the oddnumbered elements of the second source vector from the evennumbered elements of the destination and accumulator vector. The 1bit carry output is placed in the corresponding oddnumbered element of the destination vector.
31  30  29  28  27  26  25  24  23  22  21  20  19  18  17  16  15  14  13  12  11  10  9  8  7  6  5  4  3  2  1  0 
0  1  0  0  0  1  0  1  1  sz  0  Zm  1  1  0  1  0  0  Zn  Zda  
T 
if !IsFeatureImplemented(FEAT_SVE2) && !IsFeatureImplemented(FEAT_SME) then UNDEFINED; constant integer esize = 32 << UInt(sz); constant integer n = UInt(Zn); constant integer m = UInt(Zm); constant integer da = UInt(Zda);
<Zda> 
Is the name of the third source and destination scalable vector register, encoded in the "Zda" field. 
<T> 
Is the size specifier,
encoded in

<Zn> 
Is the name of the first source scalable vector register, encoded in the "Zn" field. 
<Zm> 
Is the name of the second source scalable vector register, encoded in the "Zm" field. 
CheckSVEEnabled(); constant integer VL = CurrentVL; constant integer pairs = VL DIV (esize * 2); constant bits(VL) operand = Z[n, VL]; constant bits(VL) carries = Z[m, VL]; bits(VL) result = Z[da, VL]; for p = 0 to pairs1 constant bits(esize) element1 = Elem[result, 2*p + 0, esize]; constant bits(esize) element2 = Elem[operand, 2*p + 0, esize]; constant bit carry_in = Elem[carries, 2*p + 1, esize]<0>; (res, nzcv) = AddWithCarry(element1, NOT(element2), carry_in); carry_out = nzcv<1>; Elem[result, 2*p + 0, esize] = res; Elem[result, 2*p + 1, esize] = ZeroExtend(carry_out, esize); Z[da, VL] = result;
If FEAT_SVE2 is implemented or FEAT_SME is implemented, then if PSTATE.DIT is 1:
This instruction might be immediately preceded in program order by a MOVPRFX instruction. The MOVPRFX must conform to all of the following requirements, otherwise the behavior of the MOVPRFX and this instruction is constrained unpredictable:
Internal version only: aarchmrs v202403_relA, pseudocode v202403_rel, sve v202403_rel ; Build timestamp: 20240326T09:45
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