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Awesome songs I happened to find while sitting in front of the computer

Some economy Index funds Rante Mix Sparkonot Kapital SRT

Propagation delay - PCB industry: signal speed. ASIC: time required for a logic state to switch 0/1

Useful links:

Proton - virtualization toolkit

ASIC research paper

Understanding EFI boot

Notes on memory compilers

Waveform viewers

python face detection

OSX on Qemu: https://github.com/kholia/OSX-KVM

More on ASIC

FinFET

Invisible things lab sitemap

Resources

My favourite 3D models:

Models directory

My publications:

Thesis

Regex tutorial

GitHub page

Useful notes and links

The Synopsys Memory Compiler IP includes a set of configurable embedded and specialty compilers in different architectures. The embedded SRAMs include high-speed (HS), high-density (HD), ultra-high density (UHD), and extreme high-density (EHD) architectures and are enhanced to generate memories with the absolute minimum area and power, enabling designers to achieve aggressive critical path requirements. EHD, UHD, and HD embedded memory compilers minimize area and static, dynamic power consumption, while the HS embedded memory compilers provide a much higher level of performance. EHD compilers offer the lowest possible area. In addition, Synopsys eMRAM, TCAM and Multi-Port Memory Compilers helps SoC designers to achieve the high-performance and low-power SoC requirements of new and emerging markets.

Documentation Synopsys

More information coming soon.