PAL16L8 PAT8037 **-1110-** MK, 84-12-28 DS60 SASI INTERFACE CONTROL DMC MMG DIR A13 A07 ADS BRC HLC REQ GND STB BRQ BWR BHE BLE CNT TRE DLY EXC VCC ;EQUATIONS: IF(VCC) /BRQ = REQ*/BRC*/STB + REQ* BRC* STB IF(VCC) /BWR = /DMC* DIR*/ADS + /MMG*/A13*/A07*/DIR*/ADS + REQ* STB*/BRC*/DLY IF(VCC) /BHE = /DMC*/ADS + /MMG*/A13*/A07*/ADS + REQ* STB*/HLC*/BRC*/DLY + REQ*/STB*/HLC* BRC IF(VCC) /BLE = /DMC*/ADS + /MMG*/A13*/A07*/ADS + REQ* STB* HLC*/BRC*/DLY + REQ*/STB* HLC* BRC IF(VCC) /CNT = /DMC + /MMG*/A13*/A07 + REQ* HLC* DLY IF(VCC) /TRE = /DMC*/ADS + /MMG*/A13*/A07*/ADS IF(VCC) /EXC = REQ*/STB* BRC + REQ* STB*/BRC FUNCTION TABLE: STB BRC MMG A13 A07 DIR ADS DMC HLC REQ DLY BRQ BWR BHE BLE CNT TRE EXC ;SB MAA DA D HRD B BBB CT E ;TR M10 ID M LEL R WHL NR X ;BC G37 RS C CQY Q REE TE C ----------------------------- XX XXX XX X XLX H XXX XX H LL XXX XX X XHX L XXX XX H LH XXX XX X XHX H XXX XX L HL XXX XX X XHX H XXX XX L HH XXX XX X XHX L XXX XX H XX HXX XX H XLX X HHH HH H XX LHX XH H XLX X HHH HH H XX LLL HL H XLX X HLL LL H XX LLL LL H XLX X LLL LL H XX HXX HL L XXX X LLL LL X XX HXX LL L XXX X HLL LL X HL HXX XX H HHL H LHL HH L HL HXX XX H LHL H LLH HH L LH HXX XX H HHL H HHL HH L LH HXX XX H LHL H HLH HH L XX HXX XX H HHH X HHX LH X ----------------------------- DESCRIPTION: INPUT SIGNALS: DMC - DMA CYCLE ACTIVE LOW MMG - MASS MEMORY GROUP " " DIR - DATA BUS DIRECTION OUT " " A13, A07 - CPU ADDRESS BITS ADS - ADDRESS STROBE " " BRC - BUFFER READY CONTROL FF HLC - HIGH/LOW BYTE CONTROL FF REQ - SASI REQUEST " HIGH STB - SASI TO BUFFER " " DLY - ACKNOWLEDGE DELAY " " OUTPUT SIGNALS: BRQ - BUFFER REQUESTS TRANSFER " LOW BWR - " WRITE STROBE " " BHE - " HIGH BYTE CE " " BLE - " LOW BYTE CE " " CNT - ADVANCE BUFFER POINTER " " TRE - BUS TRANSCEIVER ENABLE " " EXC - EXECUTE CYCLE (REQUEST RESPOND) " "