;**********************************************************************

;	OKI Semiconductor MSM6242 Clock Routine for BYE3xx
;	Requires Z80 processor for simulated LD  A,(C) instruction.
;	Written by John Blalock, W7AAY, 8/11/85

; The '6242 is extremely easy to interface as it is fast enough to support
; a 4 MHz Z80 without wait states.  It has a high-threshold positive chip
; select in addition to the normal ^CS, so is also very easy to interface
; to a battery-backup circuit.  Almost all you need is given in the '6242
; data sheet.  Just remember to hook CS1 to a +5V source that goes off when
; the system power is shut down.  Connect ALE to the same +5V unless your
; processor needs ALE support, then it's built in to the '6242.  You'll
; need a couple of capacitors and a 32,768 Hz crystal, a 3.6 V nicad, four
; data lines, 4 address lines, ^RD, ^WR, and a address and IOREQ decoder to
; generate a ^CS for the ^CS0 pin - pretty simple, eh?

; If you want to use the STD P output, it's "open drain" and will require a
; pull up resistor - try 10K.  The data sheet is not too clear on how to set
; the 24/12 hour modes.  To set the 24-hour mode, write a 5H to Register F,
; then a 4H.  To set the 12-hour mode, write a 1H to Register F, then a 0.
; One "feature" of the '6242 is undocumented.  Normally, to read or write
; the clock registers you stop counting by setting the HOLD bit and wait for
; the BUSY bit to change to a 0, indicating that you now have up to 1 second
; to read the registers and reset the HOLD bit.  HOLDing the '6242 for more
; than a second will cause time errors.  The problem is that sometimes, about
; once each 36,000 tries, setting HOLD will NEVER cause BUSY to go low!
; If it doesn't go low in 200 microseconds, then reset HOLD and start over.
; See the code below for an example that works.

;					John Blalock, W7AAY
;					PO Box 39356
;					Phoenix, AZ 85069
;					(602) 246-7260 300/1200 Baud

CBASE	EQU	0B0H		;BASE ADDRESS OF MSM6242
CREGD	EQU	CBASE+13	;CONTROL REGISTER D
CREGE	EQU	CBASE+14	;CONTROL REGISTER E
CREGF	EQU	CBASE+15	;CONTROL REGISTER F

TIME:	XRA	A		;CLEAR A
	OUT	CREGD		;CLEAR CONTROL REG D
	MVI	A,5		;GET HOLD BITS
	OUT	CREGD		;TELL THE 6242 WE WANT TO HOLD IT
	MVI	C,20		;BUG FIX TRY COUNTER - SEE COMMENTS ABOVE
TIME1:	IN	CREGD		;GET BUSY STATUS
	ANI	2		;BUSY ?
	JZ	TIME3		;NO, GO READ THE TIME
	DCR	C		;YES, COUNT THIS TRY
	JNZ	TIME1		;AND TRY AGAIN UNLESS ~ 200 USEC HAS PASSED
	JMP	TIME		;>200 USEC, WE FOUND THE BUG, START OVER
TIME3:	MVI	B,13		;READ 13 REGISTERS
	LXI	H,RTCTMP	;WILL PUT DATA IN TEMP RTC BUFFER
	MVI	C,CBASE		;C=1ST REGISTER
TIME4:	DB	0EDH		;SIMULATED " LD  A,(C)" INSTRUCTION
	DB	78H		;(BYE WILL THINK THESE ARE SINGLE-BYTE OPCODES)
	MOV	M,A		;SAVE THE REGISTER CONTENTS
	INR	C		;POINT TO NEXT REGISTER
	INX	H		;POINT TO NEXT TEMP BUFFER LOCATION
	DCR	B		;COUNT THIS REGISTER
	JNZ	TIME4		;REPEAT UNTIL ALL 13 DONE
	XRA	A		;CLEAR A
	OUT	CREGD		;RESET HOLD BITS
	LDA	RTCTMP+5	;GET HOUR TENS
	ANI	3		;MASK OFF UNWANTED TRASH
	MOV	B,A		;SAVE IN B REG
	LDA	RTCTMP+4	;GET HOUR UNITS
	CALL	COMBIN		;COMBINE UNITS WITH TENS
	STA	RTCBUF+0	;SAVE IN RTC BUFFER
	LDA	RTCTMP+3	;MINUTE TENS
	ANI	7
	MOV	B,A 
	LDA	RTCTMP+2	;MINUTE UNITS
	CALL	COMBIN		
	STA	RTCBUF+1
	LDA	RTCTMP+1	;SECOND TENS
	ANI	7
	MOV	B,A
	LDA	RTCTMP+0	;SECOND UNITS
	CALL	COMBIN
	STA	RTCBUF+2
	MVI	A,19H		;GET FIXED YEAR HUNDREDS AND THOUSANDS
	STA	RTCBUF+3	;(ALREADY COMBINED, SO SAVE 'EM)
	LDA	RTCTMP+11	;YEAR TENS
	ANI	0FH
	MOV	B,A
	LDA	RTCTMP+10	;YEAR UNITS
	CALL	COMBIN
	STA	RTCBUF+4
	LDA	RTCTMP+9	;MONTH  TENS
	ANI	1
	MOV	B,A
	LDA	RTCTMP+8	;MONTH UNITS
	CALL	COMBIN
	STA	RTCBUF+5
	LDA	RTCTMP+7	;DAY TENS
	ANI	3
	MOV	B,A
	LDA	RTCTMP+6	;DAY UNITS
	CALL	COMBIN
	STA	RTCBUF+6
	LDA	RTCBUF		;GET BCD HH
	CALL	BCDBIN		;CONVERT TO BINARY
	STA	CCHOUR		;PASS TO BYE
	LDA	RTCBUF+1	;GET BCD MM
	CALL	BCDBIN		;CONVERT TO BINARY
	STA	CCMIN		;PASS TO BYE
	RET

COMBIN:	PUSH	PSW		;SAVE UNITS ON STACK
	MOV	A,B		;GET TENS IN LOW NIBBLE
	RAL			;MOVE TO HIGH NIBBLE
	RAL
	RAL
	RAL
	ANI	0F0H		;MASK OFF LOW NIBBLE
	MOV	B,A		;SAVE IN REG B
	POP	PSW		;GET UNITS FROM STACK
	ANI	0FH		;MASK OFF HIGH NIBBLE
	ORA	B		;OR IN TENS NIBBLE
	RET			;A = TENS & UNITS IN BCD

RTCTMP:	DB	0,0,0,0,0,0,0,0,0,0,0,0,0	;TEMP STORAGE OF RTC DATA
;DATA BYTES ARE: S1,S10,MI1,MI10,H1,H10,D1,D10,MO1,MO10,Y1,Y10,W

;	END OF B3C-6242.INS