;
	page	50	;number of lines on page

	org	100h	;TPA BASE
	jmp	0	;just incase somebody tries to run this

	title	'TASM test program & code explanations -- Alphabetic Listing'
	pa		;page eject

	JR	addr	;JR	addr-$		Jump relative unconditional
	BIT	3,B	;BIT	3,B		Test bit # in register r (ò maù bå B,C¬D,E¬H,L,A,M)
	CCD		;CPD			Compare A with m(HL), decrement HL and BC
	CCI		;CPI			Compare A with m(HL), increment HL, decrement BC
	DCX	X	;DEC	IX		Decrement IX
	DCX	Y	;DEC	IY		Decrement IY
	EXX		;EXX			Exchange BC DE HL with BC	DE	HL	
	IM0		;IM0			Set interrupt mode 0
	IM1		;IM1			Set interrupt mode 1
	IM2		;IM2			Set interrupt mode 2
	IND		;IND			Input from port (C) to m(HL), decrement HL & B
	INI		;INI			Input from port (C) to m(HL), increment HL, decrement B
	INP	B	;IN	B,(C)		Input from port C to register r (ò maù bå B,C¬D,E¬H,L,A,M)
	INX	X	;INC	IX		Increment IX
	INX	Y	;INC	IY		Increment IY
	JRC	addr	;JR	C,addr-$	Jump relative if Carry indicator true
	JRZ	addr	;JR	Z,addr-$	Jump relative if Zero indicator true
	LDD	        ;LDD			Move m(HL) to m(DE), decrement HL, DE, and B
	LDI	        ;LDI			Move m(HL) to m(DE), increment DE and HL, decrement BC
	LXI	X,nnnn	;LD	IX,nnnn		Load IX immediate (16 bits)
	LXI	X,nnnn	;LD	IY,nnnn		Load IY immediate (16 bits)
	NEG	        ;NEG			Negate A (two	s complement)
	POP	X       ;POP	IX		Pop IX from the stack
	POP	Y       ;POP	IY		Pop IY from the stack
	RES	3,B     ;RES	3,B		Reset bit # in register r (ò maù bå B,C¬D,E¬H,L,A,M)
	RLD		;RLD			Rotate left digit
	RRD		;RRD			Rotate right digit
	ADCX	dd	;ADC	(IX+dd)		Indexed add with carry
	ADCY	dd	;ADC	(IY+dd)		Indexed add with carry
	ADDX	dd	;ADD	(IX+dd)		Indexed add to A
	ADDY	dd	;ADD	(IY+dd)		Indexed add to A
	ANDX	dd	;AND	(IX+dd)		Indexed logical and
	ANDY	dd	;AND	(IY+dd)		Indexed logical and
	BITX	3,dd	;BIT	3,(IX+dd)	Test bit # in memory at m(IX+dd)
	BITY	3,dd	;BIT	3,(IY+dd)	Test bit # in memory at m(IY+dd)
	CCDR		;CPDR			Repeat CCD until BC = 0 or A = m(HL)
	CCIR		;CPIR			Repeat CCI until BC = 0 or A = m(HL)
	CMPX	dd	;CP	(IX+dd)		Indexed compare
	CMPY	dd	;CP	(IY+dd)		Indexed compare
	DADC	D	;ADC	HL,DE		Add with carry rr to HL (rò maù bå BC¬ DE¬ SP)
	DADX	D	;ADÄ	IX,DE		Adä rò tï IX (rò maù bå BC¬ DE¬ SP¬ HL)
	DADY	D	;ADÄ	IY,DE		Adä rò tï IY (rò maù bå BC¬ DE¬ SP¬ HL)
	DCRX	dd	;DCR	(IX+dd)		Decrement memory at m(IX+dd)
	DCRY	dd	;DCR	(IY+dd)		Decrement memory at m(IY+dd)
	DJNZ	addr	;DJNZ	addr-$		Decrement B, jump relative if non-zero
	DSBC	D	;SBC	HL,DE		Subtract with "borrow" rr from HL (rr can be B,D,SP)
	EXAF		;EX	AF,AF		Exchange 'A' & Flags with alternates
	INDR		;INDR			Repeat IND until B = 0
	INIR		;INIR			Input from port (C) to m(HL), increment HL, decrement B until <> 0
	INRX	dd	;INC	(IX+dd)		Increment memory at m(IX+dd)
	INRY	dd	;INC	(IY+dd)		Increment memory at m(IY+dd)
	JRNC	addr	;JR	NC,addr-$	Jump relative if carry indicator false
	JRNZ	addr	;JR	NZ,addr-$	Jump relative if Zero indicator false
	LBCD	nnnn	;LD	BC,(nnnn)	Load BC direct (from memory at nnnn)
	LDAI		;LD	A,I		Move I to A
	LDAR		;LD	A,R		Move R to A
	LDDR		;LDDR			Repeat LDD until BC = 0
	LDED	nnnn	;LD	DE,(nnnn)	Load DE direct
	LDIR		;LDIR			Repeat LDI until BC = 0
	LDIX	B,dd	;LD	B,(IX+dd)	Load register from indexed memory (with IX)
	LDIY	B,dd	;LD	B,(IY+dd)	Load register from indexed memory (with IY)
	LIXD	nnnn	;LD	IX,(nnnn)	Load IX direct
	LIYD	nnnn	;LD	IY,(nnnn)	Load IY direct
	LSPD	nnnn	;LD	SP,(nnnn)	Load SP direct
	MVIX	nn,dd	;LD	(IX+dd),nn	Move immediate to indexed memory (with IX)
	MVIY	nn,dd	;LD	(IY+dd),nn	Move immediate to indexed memory (with IY)
	ORIX	dd	;OR	(IX+dd)		Indexed logical or
	ORIY	dd	;OR	(IY+dd)		Indexed logical or
	OTDR		;OTDR			Repeat OUTD until B = 0
	OTIR		;OTIR			Repeat OUTI until B = 0
	OUTD		;OTD			Output from m(HL) to port (C), decrement HL 
	OUTI		;OTI			Output from m(HL) to port (C), increment HL, decrement B
	OUTP	B	;OUT	(C),B		Output from register r to port (C) (ò maù bå B,C¬D,E¬H,L,A,M)
	PCIX		;JMP	(IX)		Jump to address in IX ie, Load PC from IX
	PCIY		;JMP	(IY)		Jump to address in IY ie, Load PC from IY
	PUSH	X	;PUSH	IX		Push IX into the stack
	PUSH	Y	;PUSH	IY		Push IY into the stack
	RALR	B	;RL	B		Rotate left arithmetic register
	RALX	dd	;RL	(IX+dd)		Rotate left arithmetic indexed memory
	RALY	dd	;RL	(IY+dd)		Rotate left arithmetic indexed memory
	RARR	B	;RR	B		Rotate right arithmetic register
	RARX	dd	;RR	(IX+dd)		Rotate right arithmetic indexed memory
	RARY	dd	;RR	(IY+dd)		Rotate right arithmetic indexed memory
	RESX	3,dd	;RES	3,(IX+dd)	Reset bit # in memory at m(IX+dd)
	RESY	3,dd	;RES	3,(IY+dd)	Reset bit # in memory at m(IY+dd)
	RETI		;RETI			Return from interrupt
	RETN		;RETN			Return from non-maskable interrupt
	RLCR	B	;RLC	B		Rotate left circular register
	RLCX	dd	;RLC	(IX+dd)		Rotate left circular indexed memory
	RLCY	dd	;RLC	(IY+dd)		Rotate left circular indexed memory
	RRCR	B	;RRC	B		Rotate right circular register
	RRCX	dd	;RRC	(IX+dd)		Rotate right circular indexed
	RRCY	dd	;RRC	(IY+dd)		Rotate right circular indexed
	SBCD	nnnn	;LD	(nnnn),BC	Store BC direct (to memory at nnnn)
	SBCX	dd	;SBC	(IX+dd)		Indexed subtract with "borrow"
	SBCY	dd	;SBC	(IY+dd)		Indexed subtract with "borrow"
	SDED	nnnn	;LD	(nnnn),DE	Store DE direct
	SETB	3,B	;SET	3,B		Set bit # in register r (ò maù bå B,C¬D,E¬H,L,A,M)
	SETX	3,dd	;SET	3,(IX+dd)	Set bit # in memory at m(IX+d)
	SETY	3,dd	;SET	3,(IY+dd)	Set bit # in memory at m(IY+d)
	SIXD	nnnn	;LD	(nnnn),IX	Store IX direct
	SIXD	nnnn	;LD	(nnnn),IX	Store IX direct
	SIYD	nnnn	;LD	(nnnn),IY	Store IY direct
	SIYD	nnnn	;LD	(nnnn),IY	Store IY direct
	SLAR	B	;SLA	B		Shift left register
	SLAX	dd	;SLA	(IX+dd)		Shift left indexed memory
	SLAY	dd	;SLA	(IY+dd)		Shift left indexed memory
	SPIX		;LD	SP,IX		Copy IX to the SP
	SPIY		;LD	SP,IY		Copy IY to the SP
	SRAR	B	;SRA	B		Shift right arithmetic register
	SRAX	dd	;SRA	(IX+dd)		Shift right arithmetic indexed memory
	SRAY	dd	;SRA	(IY+dd)		Shift right arithmetic indexed memory
	SRLR	B	;SRL	B		Shift right logical register
	SRLX	dd	;SRL	(IX+dd)		Shift right logical indexed memory
	SRLY	dd	;SRL	(IY+dd)		Shift right logical indexed memory
	SSPD	nnnn	;LD	(nnnn),SP	Store SP direct
	STAI		;LD	I,A		Move A to I
	STAR		;LD	R,A		Move A to R
	STIX	B,dd	;LD	(IX+dd),B	Store register to indexed memory (with IX)
	STIY	B,dd	;LD	(IY+dd),B	Store register to indexed memory (with IY)
	SUBX	dd	;SUB	(IX+sd)		Indexed subtract
	SUBY	dd	;SUB	(IY+sd)		Indexed subtract
	XORX	dd	;XOR	(IX+dd)		Indexed logical exclusive or
	XORY	dd	;XOR	(IY+dd)		Indexed logical exclusive or
	XTIX		;EX	(SP),IX		Exchange IX with the top of the stack
	XTIY		;EX	(SP),IY		Exchange IY with the top of the stack

	title	'TASM test program & code explanations -- Numeric Listing'
	pa		;page eject
	EXAF		;EX	AF,AF		Exchange 'A' & Flags with alternates
	DJNZ	addr	;DJNZ	addr-$		Decrement B, jump relative if non-zero
	JR	addr	;JR	addr-$		Jump relative unconditional
	JRNZ	addr	;JR	NZ,addr-$	Jump relative if Zero indicator false
	JRZ	addr	;JR	Z,addr-$	Jump relative if Zero indicator true
	JRNC	addr	;JR	NC,addr-$	Jump relative if carry indicator false
	JRC	addr	;JR	C,addr-$	Jump relative if Carry indicator true
	RLCR	B	;RLC	B		Rotate left circular register
	RRCR	B	;RRC	B		Rotate right circular register
	RALR	B	;RL	B		Rotate left arithmetic register
	RARR	B	;RR	B		Rotate right arithmetic register
	SLAR	B	;SLA	B		Shift left register
	SRAR	B	;SRA	B		Shift right arithmetic register
	SRLR	B	;SRL	B		Shift right logical register
	BIT	3,B	;BIT	3,B		Test bit # in register r (r may be B,C,D,E,H,L,A,M)
	RES	3,B     ;RES	3,B		Reset bit # in register r (r may be B,C,D,E,H,L,A,M)
	SETB	3,B	;SET	3,B		Set bit # in register r (r may be B,C,D,E,H,L,A,M)
	EXX		;EXX			Exchange BC DE HL with BC	DE	HL	
	DADX	D	;ADD	IX,DE		Add rr to IX (rr may be BC, DE, SP, HL)
	LXI	X,nnnn	;LD	IX,nnnn		Load IX immediate (16 bits)
	LXI	X,nnnn	;LD	IY,nnnn		Load IY immediate (16 bits)
	SIXD	nnnn	;LD	(nnnn),IX	Store IX direct
	SIXD	nnnn	;LD	(nnnn),IX	Store IX direct
	INX	X	;INC	IX		Increment IX
	LIXD	nnnn	;LD	IX,(nnnn)	Load IX direct
	DCX	X	;DEC	IX		Decrement IX
	INRX	dd	;INC	(IX+dd)		Increment memory at m(IX+dd)
	DCRX	dd	;DCR	(IX+dd)		Decrement memory at m(IX+dd)
	MVIX	nn,dd	;LD	(IX+dd),nn	Move immediate to indexed memory (with IX)
	LDIX	B,dd	;LD	B,(IX+dd)	Load register from indexed memory (with IX)
	STIX	B,dd	;LD	(IX+dd),B	Store register to indexed memory (with IX)
	ADDX	dd	;ADD	(IX+dd)		Indexed add to A
	ADCX	dd	;ADC	(IX+dd)		Indexed add with carry
	SUBX	dd	;SUB	(IX+sd)		Indexed subtract
	SBCX	dd	;SBC	(IX+dd)		Indexed subtract with "borrow"
	ANDX	dd	;AND	(IX+dd)		Indexed logical and
	XORX	dd	;XOR	(IX+dd)		Indexed logical exclusive or
	ORIX	dd	;OR	(IX+dd)		Indexed logical or
	CMPX	dd	;CP	(IX+dd)		Indexed compare
	BITX	3,dd	;BIT	3,(IX+dd)	Test bit # in memory at m(IX+dd)
	RALX	dd	;RL	(IX+dd)		Rotate left arithmetic indexed memory
	RARX	dd	;RR	(IX+dd)		Rotate right arithmetic indexed memory
	RESX	3,dd	;RES	3,(IX+dd)	Reset bit # in memory at m(IX+dd)
	RLCX	dd	;RLC	(IX+dd)		Rotate left circular indexed memory
	RRCX	dd	;RRC	(IX+dd)		Rotate right circular indexed
	SETX	3,dd	;SET	3,(IX+dd)	Set bit # in memory at m(IX+d)
	SLAX	dd	;SLA	(IX+dd)		Shift left indexed memory
	SRAX	dd	;SRA	(IX+dd)		Shift right arithmetic indexed memory
	SRLX	dd	;SRL	(IX+dd)		Shift right logical indexed memory
	POP	X       ;POP	IX		Pop IX from the stack
	XTIX		;EX	(SP),IX		Exchange IX with the top of the stack
	PUSH	X	;PUSH	IX		Push IX into the stack
	PCIX		;JMP	(IX)		Jump to address in IX ie, Load PC from IX
	SPIX		;LD	SP,IX		Copy IX to the SP
	INP	B	;IN	B,(C)		Input from port C to register r (r may be B,C,D,E,H,L,A,M)
	OUTP	B	;OUT	(C),B		Output from register r to port (C) (r may be B,C,D,E,H,L,A,M)
	SBCD	nnnn	;LD	(nnnn),BC	Store BC direct (to memory at nnnn)
	NEG	        ;NEG			Negate A (two	s complement)
	RETN		;RETN			Return from non-maskable interrupt
	IM0		;IM0			Set interrupt mode 0
	STAI		;LD	I,A		Move A to I
	LBCD	nnnn	;LD	BC,(nnnn)	Load BC direct (from memory at nnnn)
	RETI		;RETI			Return from interrupt
	STAR		;LD	R,A		Move A to R
	DSBC	D	;SBC	HL,DE		Subtract with "borrow" rr from HL (rr can be B,D,SP)
	SDED	nnnn	;LD	(nnnn),DE	Store DE direct
	IM1		;IM1			Set interrupt mode 1
	LDAI		;LD	A,I		Move I to A
	DADC	D	;ADC	HL,DE		Add with carry rr to HL (rr may be BC, DE, SP)
	LDED	nnnn	;LD	DE,(nnnn)	Load DE direct
	IM2		;IM2			Set interrupt mode 2
	LDAR		;LD	A,R		Move R to A
	RRD		;RRD			Rotate right digit
	RLD		;RLD			Rotate left digit
	SSPD	nnnn	;LD	(nnnn),SP	Store SP direct
	LSPD	nnnn	;LD	SP,(nnnn)	Load SP direct
	LDI	        ;LDI			Move m(HL) to m(DE), increment DE and HL, decrement BC
	CCI		;CPI			Compare A with m(HL), increment HL, decrement BC
	INI		;INI			Input from port (C) to m(HL), increment HL, decrement B
	OUTI		;OTI			Output from m(HL) to port (C), increment HL, decrement B
	LDD	        ;LDD			Move m(HL) to m(DE), decrement HL, DE, and B
	CCD		;CPD			Compare A with m(HL), decrement HL and BC
	IND		;IND			Input from port (C) to m(HL), decrement HL & B
	OUTD		;OTD			Output from m(HL) to port (C), decrement HL 
	LDIR		;LDIR			Repeat LDI until BC = 0
	CCIR		;CPIR			Repeat CCI until BC = 0 or A = m(HL)
	INIR		;INIR			Input from port (C) to m(HL), increment HL, decrement B until <> 0
	OTIR		;OTIR			Repeat OUTI until B = 0
	LDDR		;LDDR			Repeat LDD until BC = 0
	CCDR		;CPDR			Repeat CCD until BC = 0 or A = m(HL)
	INDR		;INDR			Repeat IND until B = 0
	OTDR		;OTDR			Repeat OUTD until B = 0
	DADY	D	;ADD	IY,DE		Add rr to IY (rr may be BC, DE, SP, HL)
	SIYD	nnnn	;LD	(nnnn),IY	Store IY direct
	SIYD	nnnn	;LD	(nnnn),IY	Store IY direct
	INX	Y	;INC	IY		Increment IY
	LIYD	nnnn	;LD	IY,(nnnn)	Load IY direct
	DCX	Y	;DEC	IY		Decrement IY
	INRY	dd	;INC	(IY+dd)		Increment memory at m(IY+dd)
	DCRY	dd	;DCR	(IY+dd)		Decrement memory at m(IY+dd)
	MVIY	nn,dd	;LD	(IY+dd),nn	Move immediate to indexed memory (with IY)
	LDIY	B,dd	;LD	B,(IY+dd)	Load register from indexed memory (with IY)
	STIY	B,dd	;LD	(IY+dd),B	Store register to indexed memory (with IY)
	ADDY	dd	;ADD	(IY+dd)		Indexed add to A
	ADCY	dd	;ADC	(IY+dd)		Indexed add with carry
	SUBY	dd	;SUB	(IY+sd)		Indexed subtract
	SBCY	dd	;SBC	(IY+dd)		Indexed subtract with "borrow"
	ANDY	dd	;AND	(IY+dd)		Indexed logical and
	XORY	dd	;XOR	(IY+dd)		Indexed logical exclusive or
	ORIY	dd	;OR	(IY+dd)		Indexed logical or
	CMPY	dd	;CP	(IY+dd)		Indexed compare
	SLAY	dd	;SLA	(IY+dd)		Shift left indexed memory
	RESY	3,dd	;RES	3,(IY+dd)	Reset bit # in memory at m(IY+dd)
	BITY	3,dd	;BIT	3,(IY+dd)	Test bit # in memory at m(IY+dd)
	SETY	3,dd	;SET	3,(IY+dd)	Set bit # in memory at m(IY+d)
	RARY	dd	;RR	(IY+dd)		Rotate right arithmetic indexed memory
	RRCY	dd	;RRC	(IY+dd)		Rotate right circular indexed
	RALY	dd	;RL	(IY+dd)		Rotate left arithmetic indexed memory
	SRLY	dd	;SRL	(IY+dd)		Shift right logical indexed memory
	SRAY	dd	;SRA	(IY+dd)		Shift right arithmetic indexed memory
	RLCY	dd	;RLC	(IY+dd)		Rotate left circular indexed memory
	POP	Y       ;POP	IY		Pop IY from the stack
	XTIY		;EX	(SP),IY		Exchange IY with the top of the stack
	PUSH	Y	;PUSH	IY		Push IY into the stack
	PCIY		;JMP	(IY)		Jump to address in IY ie, Load PC from IY
	SPIY		;LD	SP,IY		Copy IY to the SP


addr:	equ	00160h	;H is for hexidecimal 
nnnn:	equ	65535d	;D is for decimal
nn:	equ	185	;(default is also decimal)
dd:	equ	077q	;Q and O are octal

DOLLARS$ARE$NICE:	;Dollar signs are invisible in labels..
DOTS.ARE.OKAY:		;.. so are dots...
UNDER_SCORES_TOO:	;... and underscores...
U$CN.EVN.MX_UM:		; ... you can even mix them.

	end