Date: 12 Jan 1982 13:40:58-PST From: Ben Goldfarb To: Lauren Weinstein Subject: California Computer System Disk Problems Following is a compendium of Bob Tate's experiences and frustrations with CCS products, including remedies for same. Bob Tate's text follows: -------------------------------------------------------------------------- I have a IMSAI mainframe with the 2810 Z80 CPU, 2422A Floppy disk controller, and 2065 64K Dynamic RAM cards (The Expandable 1 from Priority One). I have had a lot of trouble with the system, done a lot of work on it and talked to a lot of people about it. It seems to be working ok as of now. The documentation is not that good, but it is better then Digital Researchs'. The section called "CCS'S CONTROLLER-UNIQUE SOFTWARE" is where most of the info is. Application note 5 and 7 are of the most help. App. note 5 is how to Sysgen a system and create a system disk for other then single sided, single density disks. App note 7 is about 'RLOCBIOS.COM'. They do tell you how to calulate the DDT/Sysgen offsets. The BIOS software is worse than a shambles! It makes assumptions about the drives and operating enviroment that may not be right for your system or usage. It took a lot of looking to find a lot (BUT NOT ALL) of them. e.g.: o BIOS assumes that Double Sided drives will operate at 3 ms. step rate. o If a drive is not ready it will lock up the system until it is, or the operator resets the system. o That the settling time after a step is not variable for different drives ( I have MFE 700's which step fast, but settle slowly). o That the owner doesn't have to understand what is going on in the BIOS (because of a lack of commenting in the CCBIOS.ASM). o Does not deselect the drive after it is finished with it. ( my doors lock when the drive is selected!). Several of us have reworked the BIOS and added a lot of the comments that were missing (we are still working on it). The file has grown from 33 K to 60 K so far (some for our custom drivers, most for the added comments). We also plan to convert it to Z-80 code after we have ironed all the bugs out. SOFTWARE CHANGES: (This has helped on my system) ; FROM: LEWIS MOSELEY, JR. 11/8/81 ; ; TO: CCS DISK CONTROLLER USERS ; ; SUBJECT: FIX FOR SPURIOUS SELECT ERROR PROBLEM ; ; Most users of the CCS Disk System (and the CCS Deblocking ; BIOS known as CCBIOS.ASM) have run into the problem of ; receiving spurious "BDOS ERROR ON A: SELECT" messages, when ; drive A: is a legitimate drive and should not give the error. ; After putting up with ths for a year or so, I decided to fix ; it. Some experimemtation defined the problem a little more ; specifically: the spurious SELECT error occurred when: ; 1. a drive had been running a double-density disk, and ; 2. a single-density disk was inserted, and ; 3. a call to the BDOS RESET function was made. (Note: RESETs ; result in the error; REBOOTs do not.), and ; 4. the drive was re-selected ; ; So, the response to the RESET command failed to recognize the ; change from double- to single-density. The problem was traced ; to the IDRD subroutine, and the code was added to correct the ; problem. The following IDRD subroutine should be inserted in ; place of the existing one: ; ; IDRD5: MVI B,STEPI ;BUILD A STEP-IN COMMAND CALL EOJA IDRD: LHLD LUNIT MOV A,H ;GET THE CUNIT VALUE CMP L ;SEE IF SAME AS LUNIT RZ ;RETURN IF SO IDRD1: ; ;MODIFICATION LM6 OF 11/8/81, PART 1 (ADDITION TO EXISTING CODE) ; ;TRY EACH DENSITY TWICE BEFORE GIVING UP ; LXI H,IDTRY MVI M,3 ;TWO DENSITIES, TWICE EACH ;(AND, YES, 3 IS CORRECT) IDRD0: ;LOOP REENTRY POINT ; ;END LM6 MODS, PART 1 ; MVI C,80H ;SET THE AUTO-WAIT BIT CALL SETUP PUSH H ;SAVE POINTER LXI H,HLWAIT ;WAIT FOR HEADS TO SETTLE IDRD3: DCX H MOV A,H ORA A JNZ IDRD3 LXI H,IDSV ;SET UP TO READ ADDRESS MVI B,2 ;SET UP TO READ 6(8) BYTES OF DATA MVI A,RDADD ;READ ADDRESS COMMAND DI CALL RDAT POP H ;RESTORE POINTER JZ IDRD2 ;JUMP IF GOOD READ ; ;MODIFICATION LM6, PART 2, OF 11/81 (REPLACES EXISTING CODE) ; LDA IDTRY DCR A ;TRIED 4 TIMES YET? RM ;ERROR RETURN IF SO, Z-FLAG RESET STA IDTRY ;ELSE PUT BACK COUNTER MVI A,40H XRA M ;TOGGLE DENSITY BIT (TO REG A) MOV M,A ;PUT IT BACK IN MEMORY JMP IDRD0 ;AND TRY AGAIN ; ;END OF LM6, PART 2 ; IDRD2: IN DSCTR ;GET THE TRACK NUMBER OUT DTRCK ;SET THE TRACK REGISTER CPI 2 ;INSURE NOT ON TRACK 0 OR 1 JC IDRD5 ;JUMP IF SO MOV A,M ;REGET SELBITS STA LUNIT ;UPDATE LAST USED UNIT STA CUNIT INX H ;SET THE SECTOR SIZE LDA IDSV+3 MOV M,A CMP A ;SET Z-FLAG FOR GOOD RETURN RET ; ; ; ; ; ; NOTE: IN THE DATA AREA AT THE END OF THE BIOS, ADD: ; IDTRY: DS 1 ;TRIES TO LOG IN DISK ; END OF MODS ---- HARDWARE CHANGES: These are some of the things I found, so far. CCS 2422A FDC: If you are having trouble with baud rate changes in the monitor at high rates, remove the U40 (74LS30), the ROM 'FF' detection logic. I haven't tried this, but I was told that is screws up the timing for detecting the baud rate. WRITE PROBLEMS WITH 2422 CONTROLER In a conversation with Martin Johnson of CCS on 22 June he said that by changing U10 (a 75468) to a 74LS06[sic -- see note] the write problem should be fixed. The 75468 does not reach TTL levels and so does not drive the TTL in the disk drives. NOTE: There is no such chip as the 74LS06 CCS recommended. Use a 7406. BIG N O T E !!!! The 75468 is NOT pin compatable with the 7406!!!! Use a header to adapt the '06 to the socket and get 5v from an IC near it. Make sure you get the pinouts correct! The new Rev. B board has this change on it, as well as a lot of the jumpers removed. Some of the new boards got out with out the new DOC. Request for updated DOC should be in writing. ---- This is from Paul Golobish in North Huntingdon, Pa. He is a CCS dealer and knows the hardware. I have done this and my system is more reliable now. CCS 2065 RAM: Set the pot to 6.5K for better results. Turn Phantom off. Set the last (C0-FF) Bank to "BE" and the rest to "ME". Use the fastest RAM chips you can get. CCS 2810 CPU: Boot enable & Mirror should be OFF. Look out for MWRT on the buss. If you have a front pannel, it generates it also. ---- The following are from ROYAL OAK RCPM (Keith Petersen (W8SDZ)) CCS 2422A DISK CONTROLLER FIX Chuck Weingart 2152 W Iowa Chicago IL 60622 5/14/81 The California Computer Systems 2422 disk controller is claimed to be IEE 696 compatible, but it isnt quite, and it does not work with several good Z80 CPU boards, like the Cromemco SCC or the Vector Graphics Z80 Cpu. Here is the fix for that: Break the connection to U36 Pin 12 (I did it under the 1793 chip, where it is invisible). Connect a 400pf cap. between U36 P12 and ground. Connect a 220 ohm resistor between U36 P12 and U6 Pin 6. This will delay the PWR* signal from the CPU until the 1793 has been selected and performed internal operations. The CCS CPU card has a delay of 62ns on the PWR signal, but that delay is quite longer than the IEEE specs, and other IEEE compatible boards do not have the delay necessary to make the 1793 chip work right. I hope some of this helps. If there is anything else I can do to help, contact me through Keith Petersen or Ben Goldfarb Robert B. Tate